# HG changeset patch # User Michael Pavone # Date 1429153718 25200 # Node ID a6cdcc1b1c02126c961679161aa4c8be5c715ef5 # Parent 95bc24c729e6ddf5423a410046a3d2813f2bdafb Fix il and llcompile modules enough that it actually attempts to run the compiled program diff -r 95bc24c729e6 -r a6cdcc1b1c02 modules/il.tp --- a/modules/il.tp Tue Apr 14 19:54:03 2015 -0700 +++ b/modules/il.tp Wed Apr 15 20:08:38 2015 -0700 @@ -266,7 +266,7 @@ argnum <- { num } string <- { "a" . (string: num) } = <- :other { - (not: (other isInteger?)) && (other register?) && (other argument?) && num = (other regnum) + (not: (other isInteger?)) && (other register?) && (other argument?) && num = (other argnum) } != <- :other { not: self = other @@ -401,7 +401,7 @@ regSrc returnAll raddress <- address reverse foreach: (usage liveArgsAt: raddress) :_ arg { - regSrc allocArg: (arg num) + regSrc allocArg: (arg argnum) } foreach: (usage liveRegsAt: raddress) :_ reg { regSrc allocSpecific: (assignments get: reg) @@ -489,7 +489,7 @@ skipIf: _cond newskip else: newelse } to2OpInst <- { - skipIf: _cond (to2Op: _toskip) (to2Op: _else) + skipIf: _cond (to2Op: _toskip) else: (to2Op: _else) } } } @@ -507,6 +507,26 @@ } name . " " . (regs join: " ") . " {" . block . "}" } + recordUsage:at <- :tracker :address { + foreach: regs :_ reg { + reg recordUsage: tracker at: address withSize: q + } + foreach: _scope :idx inst { + inst recordUsage: tracker at: idx | address + } + } + assignRegs:at:withSource:andUsage <- :assignments :address :regSrc :usage { + newregs <- regs map: :reg { + reg assign: assignments withSource: regSrc + } + idx <- 0 + newscope <- _scope map: :inst { + i <- inst assignRegs: assignments at: idx | address withSource: regSrc andUsage: usage + idx <- idx + 1 + i + } + save: newregs newscope + } to2OpInst <- { save: regs (to2Op: _scope) } @@ -524,6 +544,15 @@ string <- { name . " " . cond . " " . out } + recordUsage:at <- :tracker :address { + _out recordUsage: tracker at: address withSize: b + } + assignRegs:at:withSource:andUsage <- :assignments :address :regSrc :usage { + newout <- if: (_out register?) { + _out assign: assignments withSource: regSrc + } else: { _out } + bool: _cond newout + } } } @@ -641,7 +670,7 @@ if: (usage useCount) = curuses { liveArgs <- liveFrom: _argMap (usage firstUsage) to: (usage lastUsage) foreach: liveArgs :_ arg { - regSrc allocArg: (arg num) + regSrc allocArg: (arg argnum) } liveRegs <- liveFrom: _regMap (usage firstUsage) to: (usage lastUsage) @@ -678,26 +707,26 @@ //should be run after register allocation (I think....) to2Op <- :instarr { instarr fold: #[] with: :newarr inst { - if: (inst numops) = 3 { - if: (inst inb) = (inst out) { - newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size)) - } else: { - if: (inst commutative?) && (inst ina) = (inst out) { - newarr append: (op2: (inst opcode) in: (inst inb) out: (inst out) size: (inst size)) + if: (object does: inst understand?: "to2OpInst") { + newarr append: (inst to2OpInst) + } else: { + if: (inst numops) = 3 { + if: (inst inb) = (inst out) { + newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size)) } else: { - newarr append: (mov: (inst inb) (inst out) (inst size)) - newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size)) + if: (inst commutative?) && (inst ina) = (inst out) { + newarr append: (op2: (inst opcode) in: (inst inb) out: (inst out) size: (inst size)) + } else: { + newarr append: (mov: (inst inb) (inst out) (inst size)) + newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size)) + } } - } - } else: { - if: (inst numops) = 2 && (inst opcode) != _mov { - if: (inst in) != (inst out) { - newarr append: (mov: (inst in) (inst out) (inst size)) - } - newarr append: (op1: (inst opcode) val: (inst out) size: (inst size)) } else: { - if: (inst opcode) = _skipif || (inst opcode) = _save { - newarr append: (inst to2OpInst) + if: (inst numops) = 2 && (inst opcode) != _mov && (inst opcode) != _cmp { + if: (inst in) != (inst out) { + newarr append: (mov: (inst in) (inst out) (inst size)) + } + newarr append: (op1: (inst opcode) arg: (inst out) size: (inst size)) } else: { newarr append: inst } diff -r 95bc24c729e6 -r a6cdcc1b1c02 modules/llcompile.tp --- a/modules/llcompile.tp Tue Apr 14 19:54:03 2015 -0700 +++ b/modules/llcompile.tp Wed Apr 15 20:08:38 2015 -0700 @@ -126,7 +126,12 @@ } _signed <- (l signed?) || (r signed?) _opMap ifget: (expr op) :ingen { - ilf add: (ingen: lv rv (dest val) _size) + if: (lv isInteger?) { + tmp <- lv + lv <- ilf getReg + ilf add: (il mov: tmp lv ls) + } + ilf add: (ingen: rv lv (dest val) _size) #{ val <- dest val size <- _size @@ -134,12 +139,12 @@ } } else: { _compOps ifget: (expr op) :condFun { - if: (rv isInteger?) { - tmp <- rv - rv <- ilf getReg - ilf add: (il mov: tmp rv rs) + if: (lv isInteger?) { + tmp <- lv + lv <- ilf getReg + ilf add: (il mov: tmp lv ls) } - ilf add: (il cmp: lv rv _size) + ilf add: (il cmp: rv lv _size) cond <- condFun: _signed ilf add: (il bool: cond (dest val)) #{ @@ -511,7 +516,8 @@ _notError: mcode { ba <- bytearray executableFromBytes: mcode arg <- if: (length: args) > 2 { int32: (args get: 2) } else: {0} - ba runWithArg: (arg i64) + res <- ba runWithArg: (arg int64) + print: (string: res) . "\n" } else: :err { (file stderr) write: (err msg) . "\n" }