# HG changeset patch
# User Michael Pavone
Flags: No change
+ Encoding:
+
+
+
+
+ 15-12
+ 11-4
+ 3-0
+
+
+ Destination register
+ 8-bit immediate value
+ $0
+
ldimh assigns an 8-bit immediate value to the upper 8-bits of rD. @@ -154,6 +169,21 @@
Flags: No change
++ Encoding: +
15-12 | +11-4 | +3-0 | +
---|---|---|
Destination register | +8-bit immediate value | +$1 + |
Reads a byte from the address indicated by the sum of rA and rB and loads it into rD @@ -161,6 +191,23 @@
Flags: No change
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +Source B register | +$2 + |
Reads a word from the address indicated by the sum of rA and rB and loads it into rD @@ -168,6 +215,23 @@
Flags: No change
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +Source B register | +$3 + |
Writes the byte stored in rD to the address indicated by the sum of rA and rB. @@ -175,6 +239,23 @@
Flags: No change
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Register containing value to write (aka rD) | +Source A register | +Source B register | +$4 + |
Writes the word stored in rD to the address indicated by the sum of rA and rB. @@ -182,6 +263,23 @@
Flags: No change
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Register containing value to write (aka rD) | +Source A register | +Source B register | +$5 + |
Adds rA and rB. The result is stored in rD. @@ -189,11 +287,45 @@
Flags: C = carry out of bit 15, N = result is negative, Z = result is zero
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +Source B register | +$6 + |
Adds rA, rB and the carry flag. The result is stored in rD.
+ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +Source B register | +$7 + |
Flags: C = carry out of bit 15, N = result is negative, Z = result is zero
Flags: C = unmodified, N = result is negative, Z = result is zero
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +Source B register | +$8 + |
Bitwise or of rA and rB is stored in rD. @@ -210,6 +359,23 @@
Flags: C = unmodified, N = result is negative, Z = result is zero
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +Source B register | +$9 + |
Bitwise exclusive or of rA and rB is stored in rD. @@ -217,6 +383,23 @@
Flags: C = unmodified, N = result is negative, Z = result is zero
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +Source B register | +$A + |
The value in rA is shifted left by rB bits and stored in rD @@ -224,6 +407,23 @@
Flags: C = last bit shifted out of rA, N = result is negative, Z = result is zero
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +Source B register | +$B + |
The value in rA is shifted right by rB bits and stored in rD @@ -231,6 +431,23 @@
Flags: C = last bit shifted out of rA, N = result is negative, Z = result is zero
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +Source B register | +$C + |
The value in rA is arithmetically shifted right by rB bits and stored in rD. The most significant bit of rA is copied @@ -239,6 +456,23 @@
Flags: C = last bit shifted out of rA, N = result is negative, Z = result is zero
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +Source B register | +$D + |
bCC performs a relative branch if the condition indicated by CC is true. It has a range of 131 instructions forward or @@ -316,6 +550,22 @@
Flags: No change
+ ++ Encoding: +
15-12 | +11-4 | +3-0 | +
---|---|---|
CC | +Signed 8-bit offset. Offset is multiplied by two before being added to PC | +$E + |
Stores the value of rA in rD. This can be used as a return or jump instruction if rD is PC. @@ -323,6 +573,23 @@
Flags: No change
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +$0 | +$F + |
Calculates the 2s complement of rA and stores it in rD. This can be used in combination with add to implement subtraction. @@ -330,6 +597,23 @@
Flags: C = carry out of bit 15, N = result is negative, Z = result is zero
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +$1 | +$F + |
Calculates the 1s complement of rA and stores it in rD. @@ -337,6 +621,23 @@
Flags: C = unmodified, N = result is negative, Z = result is zero
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +$2 | +$F + |
Subtracts rA from rD and discards the result, but still updates flags. @@ -344,6 +645,23 @@
Flags: C = carry out of bit 15, N = result is negative, Z = result is zero
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +$3 | +$F + |
Stores the address of the next instruction in rD and sets PC to the value in rA. Used for calling subroutines. @@ -351,6 +669,23 @@
Flags: No change
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +$4 | +$F + |
Swaps the values in rA and rD. @@ -358,6 +693,23 @@
Flags: No change
++ Encoding: +
15-12 | +11-8 | +7-4 | +3-0 | +
---|---|---|---|
Destination register | +Source A register | +$5 | +$F + |
Reads a word from the IO port indicated by rA and stores it in rD.