Thu, 01 Sep 2016 21:52:48 -0700 |
Michael Pavone |
Implement lsli and lsri in assembler
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Tue, 30 Aug 2016 20:50:54 -0700 |
Michael Pavone |
Rework data segment setup to allow a stack segment and to add space for push and pop instructions
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Sat, 27 Aug 2016 22:38:31 -0700 |
Michael Pavone |
Changed the design to vastly simplify the video hardware and support a 23-bit address space on the CPU
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Fri, 01 Apr 2016 21:51:46 -0700 |
Michael Pavone |
Updated spec to make the 3rd and 4th controller IO ports as reserved
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Thu, 31 Mar 2016 23:25:52 -0700 |
Michael Pavone |
Implemented timer and timer interrupts. Added get/setvbr instructions. Fixed assembler bug. Moved mnemonics into a separate source file
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Sat, 26 Mar 2016 23:30:50 -0700 |
Michael Pavone |
Removed redundant definitino of some exception register instructinos in spec
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Fri, 25 Mar 2016 19:26:23 -0700 |
Michael Pavone |
Added basic rendering timing outline and made some other minor spec changes
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Fri, 25 Mar 2016 09:06:29 -0700 |
Michael Pavone |
Fleshed out the video hardware design somewhat
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Wed, 23 Mar 2016 19:19:29 -0700 |
Michael Pavone |
Revert changes to handling of immediate versions of bitwise instructions. Replace asri with cmpi.
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Tue, 22 Mar 2016 22:44:02 -0700 |
Michael Pavone |
Initial commit. CPU working well enough for simple hello world program.
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