Mercurial > repos > simple16
diff simple_console.txt @ 43:6e7bfe83d2b0
Changed the design to vastly simplify the video hardware and support a 23-bit address space on the CPU
author | Michael Pavone <pavone@retrodev.com> |
---|---|
date | Sat, 27 Aug 2016 22:38:31 -0700 |
parents | 351a0d0cce3b |
children | 51672bd41cdd |
line wrap: on
line diff
--- a/simple_console.txt Mon Apr 11 23:35:51 2016 -0700 +++ b/simple_console.txt Sat Aug 27 22:38:31 2016 -0700 @@ -43,13 +43,15 @@ A = register containing pointer to function D = register that will store PC value 5: swap -6: in -7: out -8: ini -9: outi -A: addi -B: andi -C: ori +6: longjmp + A = register containing pointer to function + D = register containing new code segment value +7: ini +8: outi +9: addi +A: andi +B: ori +C: xori D: ls[lr]i MSB of AAAA determines direction LS 3 bits determines magnitude @@ -60,21 +62,21 @@ DDDD OOOO 1111 1111 0: reti - return from interrupt, D = register to restore from uer -1: trap -2: trapi -3: getepc -4: setepc -5: getesr -6: setesr -7: getenum -8: setenum -9: getuer -A: setuer -B: invalid -C: invalid -D: invalid -E: invalid -F: invalid +1: trapi +2: getepc +3: setepc +4: getepch +5: setepch +6: getesr +7: setesr +8: getenum +9: setenum +A: getuer +B: setuer +C: getvbr +D: setvbr +E: getdatabanks +F: setdatabanks Registers: @@ -86,9 +88,11 @@ Special Registers epc - Exception PC - Stores PC value to resume to when entering an exception handler +epch - High 7-bits of PC esr - Exception SR - same as above, but for SR eur - Exceptuion User Reg - reg for temporary storage of a reg in a handler, intended to be used for the stack pointer enum - Exception Number - holds the number of the most recent exception +databanks - Holds the upper bytes used for data accesses (MSB = byte for upper half of memory space, LSB = byte for lower half of memory space) IO: Ports @@ -101,7 +105,7 @@ Load value for a 16-bit down-counter Polarity of output is switched on transition from 1 to 0 Value is loaded on cycles where counter is 0 - Special case value of 0 in this register forces polarity to positive + Special case value of 0 in this register forces polarity to positive, useful for PCM playback 5: Channel B Freq 6: Channel C Freq 7: Channel D Freq @@ -112,82 +116,46 @@ A: Timer Freq B: "Serial" Debug Port -C: Write Vertical Scroll : Read Vertical Position - MMMM MCCC CCCC CFFF - C = coarse scroll bit - F = fine scroll bit - M = mask bit - controls which bits come directly from register - and which bits come from the sum of the register - and the current line number - -D: Write Horizontal Scroll : Read Horizontal Position - xxxx xxxC CCCC CFFF - C = coarse scroll bit - F = fine scroll bit - x = unused -E: Write Dest Address : Read Status -F: Write Data : Read ??? +C: Framebuffer start offset : Read Vertical Position +D: Graphics mode : Read Horizontal Position + EDVP PSSS SSEE EEEF + E = 0 display disabled, 1 display enabled + D = 0 4 bpp, 1 8bpp + F = 0 front buffer is lower 64K, 1 front buffer is upper 64K + P = palette select + S = blanked lines at start of frame + E = blanked lines at end of frame +E: CRAM update port : Read Status + 1st write determines destination and length + DDDD DDDD LLLL LLLL + Next L writes are written to D and subsequent addresses + +F: Reserved -Name Table Start Address: - 0VVV VVVV VHHH HHH0 - - V = Coarse scroll bit from vertical scroll value - H = Coarse scroll bit from horizontal scroll value +Video Hardware: + 128KB of VRAM organized into two 64KB linear framebuffers + Pixels are 4bpp or 8bbp in chunky format + 256 words of 16-bit CRAM + In 4bpp mode, P field of graphics mode selects one of 4, 16 color palettes + S and E fields of mode allow hardware letter boxing, effectively increasing the length of vblank + F field selects which 64KB framebuffer is used for the active display + Active buffer is inaccessible to CPU, but CPU has free reign over inactive buffer + H-Counter goes from 0-415 and then wraps back to zero + V-Counter goes from 0-261 and then wraps back to zero + V-Counter increments when H-Counter wraps -VDP Memory Map -0000 - 7FFF = Pattern/Name Table RAM -8000 - FDFF = unused, returns $FFFF -FE00 - FEFF = Sprite RAM -FF00 - FF7F = Palette RAM -FF80 - FFFF = Palette RAM (mirror) - -Another View - - MSB determines whether destination is main RAM - For MSB 1 - Next 7 MSB determines which special RAM is the destination - Only values of 7E and 7F are valid for these bits at present - 8 LSB determine offset (1 LSB ignored) - -Writing to Data port puts value into a one word FIFO -Offset within memory type is increment when word is pulled from FIFO -Writing to the FIFO when it is full will cause the existing entry to be overwritten - +Memory Map + 23-bit address space + $0 - $3FFFFF - ROM + $400000 - $4FFFFF - 128K RAM, mirrored every 128KB + $500000 - $6FFFFF - Reserved + $700000 - $7FFFFF - 64KB VRAM back buffer, mirrored every 64KB -Pattern Format: -4bpp in an 8x8 tile arrangement - - -Sprite Table Entry: - -XXXXXXXX YYYYYYYY -IXPVHSNN NNNNNNNN - -S: size -- 0 = 8x8, 1 = 16x16 -P: Palette selector -H: Horizontal flip -V: Vertical flip -I: Priority -N: Name -X: X position (left of screen = 16, right of screen = ?) -Y: Y position (top of screen = 16, bottom of screen = 240) - - -Name Table Entry: - -IPPVHxNN NNNNNNNN - -P: Palette selector -H: Horizontal flip -V: Vertical flip -I: Priority -N: Name -x: Unused, should be set to 0 26.112 MHZ Clock Dot Clock Divider 4 -CPU Clock Divider 20 (assuming 1 cycle/instruction, 5 for 4 cycles/instruction) +CPU Clock Divider 4 (assuming 1 cycle/instruction, 1 for 4 cycles/instruction) Audio Timer Divider 34 Audio Output Divider 544 Interrupt Timer Divider 32 @@ -195,19 +163,3 @@ Alternatively 13.056 Mhz clock and cut the dividers in half - -H-Counter goes from 0-415 and then wraps back to zero -V-Counter goes from 0-261 and then wraps back to zero -V-Counter increments when H-Counter wraps - -Rendering Process: -208 main VRAM access slots -123 slots for background -160-123 = 37 extra slots during active display - 48 slots during inactive display -80 slots for sprite rendering -5 slots remain for refresh or external access - -Since sprite rendering needs to intrude on active display period, -a double buffered line buffer is needed. Useful for VGA compatibility anyway -