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diff src/cpu.c @ 46:51672bd41cdd

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Rework data segment setup to allow a stack segment and to add space for push and pop instructions
author Michael Pavone <pavone@retrodev.com>
date Tue, 30 Aug 2016 20:50:54 -0700
parents 6e7bfe83d2b0
children 9a3b9d86dabf
line wrap: on
line diff
--- a/src/cpu.c	Mon Aug 29 21:17:41 2016 -0700
+++ b/src/cpu.c	Tue Aug 30 20:50:54 2016 -0700
@@ -127,10 +127,10 @@
 void vector_fetch(cpu *context)
 {
 	context->exception_pc = context->regs[REG_PC] - 2;
-	context->exception_pch = context->pc_msb >> 16;
+	context->exception_pc_msb = context->pc_msb;
 	context->exception_sr = context->regs[REG_SR];
 	context->regs[REG_SR] &= ~(STATUS_INT0_ENABLE | STATUS_INT1_ENABLE);
-	context->regs[REG_PC] = cpu_read_16(context, context->vector_base + context->exception * 2);
+	context->regs[REG_PC] = cpu_read_16(context, (context->vector_base + context->exception * 2) & 0xFFFF);
 	context->pc_msb = 0;
 	context->state = STATE_NEED_FETCH;
 }
@@ -236,12 +236,25 @@
 		context->regs[dst] = context->exception_ur;
 		context->regs[REG_PC] = context->exception_pc;
 		context->regs[REG_SR] = context->exception_sr;
+		context->pc_msb = context->exception_pc_msb;
 		context->state = STATE_NEED_FETCH;
 		return;
 	case TRAPI:
 		context->state = STATE_EXCEPTION_START;
 		context->exception = dst;
-		return;	
+		return;
+	case PUSH:
+		break;
+	case POP:
+		break;
+	case GETPCH:
+		context->regs[dst] = context->exception_pc_msb >> 8 | context->pc_msb >> 16;
+		break;
+	case SETPCH:
+		context->exception_pc_msb = context->regs[dst] << 8 & 0x7F0000;
+		context->pc_msb = context->regs[dst] << 16 & 0x7F0000;
+		context->state = STATE_NEED_FETCH;
+		return;
 	case GETEPC:
 		context->regs[dst] = context->exception_pc;
 		break;
@@ -272,17 +285,6 @@
 	case SETVBR:
 		context->vector_base = context->regs[dst];
 		break;
-	case GETDATABANKS:
-		context->regs[dst] = context->data_high_msb >> 7 | context->data_low_msb >> 15;
-		break;
-	case SETDATABANKS:
-		context->data_high_msb = (context->regs[dst] & 0xFF00) << 7;
-		context->data_low_msb = (context->regs[dst] & 0xFF) << 15;
-		break;
-	default:
-		context->state = STATE_EXCEPTION_START;
-		context->exception = EXCEPTION_INVALID_INSTRUCTION;
-		return;
 	}
 	if (dst == REG_PC) {
 		context->state = STATE_NEED_FETCH;
@@ -390,10 +392,12 @@
 	uint32_t address = context->regs[a] + context->regs[b];
 	if (a == REG_PC || b == REG_PC) {
 		address |= context->pc_msb;
+	} else if (a == REG_SP || b == REG_SP) {
+		address |= context->regs[REG_SR] << 8 & 0x7F0000;
 	} else if (address & 0x8000) {
-		address = (address & 0x7FFF) | context->data_high_msb;
+		address = (address & 0x7FFF) | (context->regs[REG_DB] << 15 & 0x7F8000);
 	} else {
-		address |= context->data_low_msb;
+		address |= context->regs[REG_DB] << 7 & 0x7F8000;
 	}
 	return address;
 }