--- a/simple_console.txt	Mon Aug 29 21:17:41 2016 -0700
+++ b/simple_console.txt	Tue Aug 30 20:50:54 2016 -0700
@@ -63,36 +63,44 @@
 
 0: reti - return from interrupt, D = register to restore from uer
 1: trapi
-2: getepc
-3: setepc
-4: getepch
-5: setepch
-6: getesr
-7: setesr
-8: getenum
-9: setenum
+2: push
+3: pop
+4: getpch
+5: setpch
+6: getepc
+7: setepc
+8: getesr
+9: setesr
 A: getuer
 B: setuer
-C: getvbr
-D: setvbr
-E: getdatabanks
-F: setdatabanks
+C: getenum
+D: setenum
+E: getvbr
+F: setvbr
 
 
 Registers:
 
-r0 - r12 : general purpose
-r13 : technically general purpose, but canonically the stack register
+r0 - r11 : general purpose
+r12 : Data Banks - Holds the upper bytes used for data accesses (MSB = byte for lower half of memory space, LSB = byte for upper half of memory space)
+r13 : stack register
 r14 : PC
-r15 : status register
+r15 : status register, Stack MSB
+	Layout: XSSS SSSS XXXN CZ10
+		S = Stack most significant bits
+		N = Negaitve flag
+		C = Carry flag
+		Z = Zero flag
+		1 = Interrupt 1 enable
+		0 = Interrupt 0 enable
 
 Special Registers
+pch - PC High - Low byte stores current PC High value, Upper byte stores saved PC High value when entering an exception handler
 epc - Exception PC - Stores PC value to resume to when entering an exception handler
-epch - High 7-bits of PC
 esr - Exception SR - same as above, but for SR
 eur - Exceptuion User Reg - reg for temporary storage of a reg in a handler, intended to be used for the stack pointer
 enum - Exception Number - holds the number of the most recent exception
-databanks - Holds the upper bytes used for data accesses (MSB = byte for upper half of memory space, LSB = byte for lower half of memory space)
+vbr - Vector Base Register - Base address in page 0 of vector table
 
 IO: Ports
 
@@ -151,8 +159,22 @@
 	$400000 - $4FFFFF - 128K RAM, mirrored every 128KB
 	$500000 - $6FFFFF - Reserved
 	$700000 - $7FFFFF - 64KB VRAM back buffer, mirrored every 64KB
+	
+Banking/Segments:
+	Code Segment: 64KB, used for instruction fetch and PC-relative load/stores
+	Stack Segment: 64KB, used for push/pop and SP-relative load/stores
+	Upper Data Segment: 32KB, used for load/stores to addresses in the upper half of the 16-bit address space
+	Lower Data Segment: 32KB, used for load/stores to addresses in the lower half of the 16-bit address space
 
-
+	23-bit address generation details:
+		Code segment
+			r14 (aka PC) is used for the low 16 bits of the address and PCH is used for the upper 7 bits
+		Stack Segment
+			r13 (aka SP) is used for the low 16 bits of the address and the upper byte of SR is used for
+			the upper 7-bits. Note that for a load/store that uses both PC and SP, the code segment is used
+		Data segments
+			The low 15-bits of the computed 16-bit address are used directly. The most significant bit
+			selects a data segment and then the relevant byte of r12 is used for the upper 8 bits
 26.112 MHZ Clock
 Dot Clock Divider 4
 CPU Clock Divider 4 (assuming 1 cycle/instruction, 1 for 4 cycles/instruction)