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annotate src/cpu.h @ 33:eda4919d955f

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Forgot to call controller_init
author Michael Pavone <pavone@retrodev.com>
date Sun, 03 Apr 2016 19:03:11 -0700
parents fb14515266f4
children 6e7bfe83d2b0
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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0
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1 #ifndef CPU_H_
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2 #define CPU_H_
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3
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4
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5 typedef struct cpu cpu;
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6
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7 typedef void (*port_write_fun) (cpu *context, uint8_t port, uint16_t value);
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8 typedef uint16_t (*port_read_fun) (cpu *context, uint8_t port);
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9
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10 typedef struct {
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11 port_write_fun write;
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12 port_read_fun read;
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13 } port_handler;
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14
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15
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16 #define MEM_READ 1
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17 #define MEM_WRITE 2
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18
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19 typedef struct {
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20 uint8_t *base;
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21 uint16_t start;
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22 uint16_t end;
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23 uint8_t flags;
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24 } memory_region;
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26
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27 struct cpu {
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28 void *system;
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29 uint32_t cycles;
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30 uint32_t clock_inc;
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31 uint32_t current_target;
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32 uint32_t num_mem_regions;
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33 uint16_t regs[16];
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34 uint16_t exception;
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35 uint16_t exception_pc;
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36 uint16_t exception_sr;
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37 uint16_t exception_ur;
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38 uint16_t vector_base;
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39
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40 uint16_t prefetch;
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41
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42 uint8_t state;
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43 uint8_t pending_interrupts;
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44
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45 port_handler port_handlers[16];
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46 memory_region mem_regions[];
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47 };
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48
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49 cpu* alloc_cpu(uint32_t clock_divider, uint32_t num_regions, memory_region *regions);
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50 void run_cpu(cpu *context, uint32_t target_cycle);
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51 //To be implemented by system
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52 uint32_t next_interrupt_cycle(cpu *context, uint8_t mask);
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53 uint8_t get_current_interrupts(cpu *context);
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54 void ack_interrupt(cpu *context, int which);
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55
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56 extern char * mnemonics[];
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57 extern char * mnemonics_single_src[];
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58 extern char * mnemonics_single_reg[];
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59
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60 enum {
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61 LDIM,
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62 LDIMH,
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63 LD8,
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64 LD16,
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65 STR8,
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66 STR16,
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67 ADD,
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68 ADC,
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69 AND,
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70 OR,
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71 XOR,
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72 LSL,
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73 LSR,
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74 ASR,
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75 BCC,
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76 SINGLE_SOURCE
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77 };
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78
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79 enum {
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80 MOVE,
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81 NEG,
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82 NOT,
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83 CMP,
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84 CALL,
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85 SWAP,
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86 IN,
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87 OUT,
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88 INI,
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89 OUTI,
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90 ADDI,
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91 ANDI,
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92 ORI,
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93 LSI,
2
6204c81e2933 Revert changes to handling of immediate versions of bitwise instructions. Replace asri with cmpi.
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94 CMPI,
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95 SINGLE_REG
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96 };
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97
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98 enum {
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99 RETI,
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100 TRAP,
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101 TRAPI,
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102 GETEPC,
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103 SETEPC,
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104 GETESR,
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105 SETESR,
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106 GETEUR,
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107 SETEUR,
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108 GETENUM,
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109 SETENUM,
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110 GETVBR,
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111 SETVBR
0
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112 };
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113
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114 enum {
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115 COND_ALWAYS,
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116 COND_NEVER,
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117 COND_ZERO,
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118 COND_NZERO,
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119 COND_NEG,
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120 COND_POS,
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121 COND_CARRY,
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122 COND_NCARRY,
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123 COND_GREATER,
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124 COND_LEQ
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125 };
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126
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127 #define REG_PC 14
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128 #define REG_SR 15
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129
0
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130 #endif //CPU_H_