Mercurial > repos > simple16
annotate simple16.html @ 40:413e7b9c0db1
Added flag change documentation for all instructions. Added hyperlinks to individual instructions. Added overviews for all the peripherals
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Thu, 07 Apr 2016 21:58:27 -0700 |
| parents | 52d601e13ea4 |
| children | a64e11e48a41 |
| rev | line source |
|---|---|
| 39 | 1 <!doctype html> |
| 2 <html> | |
| 3 <head> | |
| 4 <style> | |
| 5 body { | |
| 6 font-family: Helvetica, Arial, sans-serif; | |
| 7 } | |
| 8 </style> | |
| 9 </head> | |
| 10 <body> | |
| 11 <h1>Simple 16</h1> | |
| 12 <p> | |
| 13 Simple 16 is a toy 16-bit video game console designed with simplicity of implementation in mind. While it is technically a 16-bit system, | |
| 14 it's capabilites are in many ways closer to an 8-bit system. Ultimately, the hope is that Simple 16 is simple enough to provide an easy | |
| 15 introduction for the novice emudev while still containing all the essential features of an older game console. | |
| 16 | |
| 17 </p> | |
| 18 <h2>Table of Contents</h2> | |
| 19 <ul> | |
| 20 <li><a href="#cpu">CPU</a> | |
| 21 <ul> | |
| 22 <li><a href="#cpuover">Overview</a></li> | |
| 23 <li><a href="#cpuregs">Registers</a></li> | |
| 24 <li><a href="#instructions">Instructions</a></li> | |
| 25 <li><a href="#execution">Execution Details</a></li> | |
| 26 <li><a href="#interrupts">Exceptions and Interrupts</a></li> | |
| 27 </ul> | |
| 28 </li> | |
|
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29 <li><a href="#video">Video</a> |
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30 <ul> |
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31 <li><a href="#vidover">Overview</a></li> |
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32 <li><a href="#vidregs">IO Ports</a></li> |
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33 <li><a href="#vidmem">Memory Map</a></li> |
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34 <li><a href="#vidrender">Rendering</a></li> |
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35 </ul> |
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36 </li> |
| 39 | 37 <li><a href="#audio">Audio</a></li> |
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38 <ul> |
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39 <li><a href="#audover">Overview</a></li> |
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40 <li><a href="#audregs">IO Ports</a></li> |
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41 </ul> |
| 39 | 42 <li><a href="#timer">Timer</a></li> |
| 43 <li><a href="#controllers">Controllers</a></li> | |
| 44 <li><a href="#serial">Serial Port</a></li> | |
| 45 <li><a href="#cart">Cartridge</a></li> | |
| 46 </ul> | |
| 47 <h2 id="cpu">CPU</h2> | |
| 48 <h3 id="cpuover">Overview</h3> | |
| 49 <p> | |
| 50 The Simple 16 CPU is a 16-bit RISC design. It has a main register file of 16 16-bit registers. Additionally, there are five special | |
| 51 purpose registers dedicated to exception processing. It has a flag 16-bit addres space. Instructions are a fixed size and are also 16-bits. | |
| 52 </p> | |
| 53 <h3 id="cpuregs">Registers</h3> | |
| 54 <p> | |
| 55 The first 14 registers in the main file have no fixed function and are named r0 through r13. r14 serves as the program counter and | |
| 56 points to the next instruction to be fetched. More information about instruction fetch and execution can be found in | |
| 57 <a href="#execution">Execution Details</a>. r15 serves as the status register. The status register contains bits corresponding | |
| 58 to the result of the last arithmetic instruction and the interrupt mask. The layout of the status register is given below. | |
| 59 </p> | |
| 60 <table> | |
| 61 <tr> | |
| 62 <th>Bit</th> | |
| 63 <th>Use</th> | |
| 64 <th>Notes</th> | |
| 65 <tr> | |
| 66 <td>15-5</td> | |
| 67 <td>Unused</td> | |
| 68 <td>Should be set to zero.</td> | |
| 69 </tr> | |
| 70 <tr> | |
| 71 <td>4</td> | |
| 72 <td>Negative Flag</td> | |
| 73 <td>Indicates the last result was negative.</td> | |
| 74 </tr> | |
| 75 <tr> | |
| 76 <td>3</td> | |
| 77 <td>Carry Flag</td> | |
| 78 <td>Generally indicates a carry out of bit 15. Last bit shifted out for shift instructions.</td> | |
| 79 </tr> | |
| 80 <tr> | |
| 81 <td>2</td> | |
| 82 <td>Zero fFag</td> | |
| 83 <td>Indicates the last result was zero.</td> | |
| 84 </tr> | |
| 85 <tr> | |
| 86 <td>1</td> | |
| 87 <td>Interrupt 1 enable</td> | |
| 88 <td>Interrupt 1 can be taken when this bit is set.</td> | |
| 89 </tr> | |
| 90 <tr> | |
| 91 <td>0</td> | |
| 92 <td>Interrupt 0 enable</td> | |
| 93 <td>Interrupt 0 can be taken when this bit is set.</td> | |
| 94 </tr> | |
| 95 </table> | |
| 96 <h3 id="instructions">Instructions</h3> | |
| 97 <ul> | |
| 98 <li><a href="#ldim">ldim IM, rD</a></li> | |
| 99 <li><a href="#ldimh">ldimh IM, rD</a></li> | |
| 100 <li><a href="#ld8">ld8 rA, rB, rD</a></li> | |
| 101 <li><a href="#ld16">ld16 rA, rB, rD</a></li> | |
| 102 <li><a href="#str8">str8 rA, rB, rD</a></li> | |
| 103 <li><a href="#str16">str16 rA, rB, rD</a></li> | |
| 104 <li><a href="#add">add rA, rB, rD</a></li> | |
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105 <li><a href="#adc">adc rA, rB, rD</a></li> |
| 39 | 106 <li><a href="#and">and rA, rB, rD</a></li> |
| 107 <li><a href="#or">or rA, rB, rD</a></li> | |
| 108 <li><a href="#xor">xor rA, rB, rD</a></li> | |
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109 <li><a href="#lsl">lsl rA, rB, rD</a></li> |
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110 <li><a href="#lsr">lsr rA, rB, rD</a></li> |
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111 <li><a href="#asr">asr rA, rB, rD</a></li> |
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112 <li><a href="#bcc">bCC LABEL</a></li> |
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113 <li><a href="#mov">mov rA, rD</a></li> |
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114 <li><a href="#neg">neg rA, rD</a></li> |
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115 <li><a href="#not">not rA, rD</a></li> |
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116 <li><a href="#cmp">cmp rA, rD</a></li> |
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117 <li><a href="#call">call rA, rD</a></li> |
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118 <li><a href="#swap">swap rA, rD</a></li> |
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119 <li><a href="#in">in rA, rD</a></li> |
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120 <li><a href="#out">out rA, rD</a></li> |
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121 <li><a href="#ini">ini IM, rD</a></li> |
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122 <li><a href="#outi">outi IM, rD</a></li> |
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123 <li><a href="#addi">addi IM, rD</a></li> |
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124 <li><a href="#andi">andi IM, rD</a></li> |
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125 <li><a href="#ori">ori IM, rD</a></li> |
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126 <li><a href="#lsli">lsli IM, rD</a></li> |
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127 <li><a href="#lsri">lsri IM, rD</a></li> |
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128 <li><a href="#cmpi">cmpi IM, rD</a></li> |
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129 <li><a href="#reti">reti rD</a></li> |
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130 <li><a href="#trap">trap rD</a></li> |
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131 <li><a href="#trapi">trapi IM</a></li> |
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132 <li><a href="#getepc">getepc rD</a></li> |
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133 <li><a href="#setepc">setepc rD</a></li> |
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134 <li><a href="#getesr">getesr rD</a></li> |
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135 <li><a href="#setesr">setser rD</a></li> |
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136 <li><a href="#geteur">geteur rD</a></li> |
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137 <li><a href="#seteur">seteur rD</a></li> |
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138 <li><a href="#getenum">getenum rD</a></li> |
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139 <li><a href="#setenum">setenum rD</a></li> |
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140 <li><a href="#getvbr">getvbr rD</a></li> |
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141 <li><a href="#setvbr">setvbr rD</a></li> |
| 39 | 142 </ul> |
| 143 <h4 id="ldim">ldim IM, rD</h4> | |
| 144 <p> | |
| 145 ldim sign extends an 8-bit immediate value to 16-bits and assigns it to the designated register. | |
| 146 </p> | |
| 147 <p> | |
| 148 <strong>Flags:</strong> No change | |
| 149 </p> | |
| 150 <h4 id="ldimh">lidmh IM, rD</h4> | |
| 151 <p> | |
| 152 ldimh assigns an 8-bit immediate value to the upper 8-bits of rD. | |
| 153 </p> | |
| 154 <p> | |
| 155 <strong>Flags:</strong> No change | |
| 156 </p> | |
| 157 <h4 id="ld8">ld8 rA, rB, rD</h4> | |
| 158 <p> | |
| 159 Reads a byte from the address indicated by the sum of rA and rB and loads it into rD | |
| 160 </p> | |
| 161 <p> | |
| 162 <strong>Flags:</strong> No change | |
| 163 </p> | |
| 164 <h4 id="ld16">ld16 rA, rB, rD</h4> | |
| 165 <p> | |
| 166 Reads a word from the address indicated by the sum of rA and rB and loads it into rD | |
| 167 </p> | |
| 168 <p> | |
| 169 <strong>Flags:</strong> No change | |
| 170 </p> | |
| 171 <h4 id="str8">str8 rA, rB, rD</h4> | |
| 172 <p> | |
| 173 Writes the byte stored in rD to the address indicated by the sum of rA and rB. | |
| 174 </p> | |
| 175 <p> | |
| 176 <strong>Flags:</strong> No change | |
| 177 </p> | |
| 178 <h4 id="str16">str16 rA, rB, rD</h4> | |
| 179 <p> | |
| 180 Writes the word stored in rD to the address indicated by the sum of rA and rB. | |
| 181 </p> | |
| 182 <p> | |
| 183 <strong>Flags:</strong> No change | |
| 184 </p> | |
| 185 <h4 id="add">add rA, rB, rD</h4> | |
| 186 <p> | |
| 187 Adds rA and rB. The result is stored in rD. | |
| 188 </p> | |
| 189 <p> | |
| 190 <strong>Flags:</strong> C = carry out of bit 15, N = result is negative, Z = result is zero | |
| 191 </p> | |
| 192 <h4 id="adc">adc rA, rB, rD</h4> | |
| 193 <p> | |
| 194 Adds rA, rB and the carry flag. The result is stored in rD. | |
| 195 </p> | |
| 196 <p> | |
| 197 <strong>Flags:</strong> C = carry out of bit 15, N = result is negative, Z = result is zero | |
| 198 </p> | |
| 199 <h4 id="and">and rA, rB, rD</h4> | |
| 200 <p> | |
| 201 Bitwise and of rA and rB is stored in rD. | |
| 202 </p> | |
| 203 <p> | |
| 204 <strong>Flags:</strong> C = unmodified, N = result is negative, Z = result is zero | |
| 205 </p> | |
| 206 <h4 id="or">or rA, rB, rD</h4> | |
| 207 <p> | |
| 208 Bitwise or of rA and rB is stored in rD. | |
| 209 </p> | |
| 210 <p> | |
| 211 <strong>Flags:</strong> C = unmodified, N = result is negative, Z = result is zero | |
| 212 </p> | |
| 213 <h4 id="xor">xor rA, rB, rD</h4> | |
| 214 <p> | |
| 215 Bitwise exclusive or of rA and rB is stored in rD. | |
| 216 </p> | |
| 217 <p> | |
| 218 <strong>Flags:</strong> C = unmodified, N = result is negative, Z = result is zero | |
| 219 </p> | |
| 220 <h4 id="lsl">lsl rA, rB, rD</h4> | |
| 221 <p> | |
| 222 The value in rA is shifted left by rB bits and stored in rD | |
| 223 </p> | |
| 224 <p> | |
| 225 <strong>Flags:</strong> C = last bit shifted out of rA, N = result is negative, Z = result is zero | |
| 226 </p> | |
| 227 <h4 id="lsr">lsr rA, rB, rD</h4> | |
| 228 <p> | |
| 229 The value in rA is shifted right by rB bits and stored in rD | |
| 230 </p> | |
| 231 <p> | |
| 232 <strong>Flags:</strong> C = last bit shifted out of rA, N = result is negative, Z = result is zero | |
| 233 </p> | |
| 234 <h4 id="asr">asr rA, rB, rD</h4> | |
| 235 <p> | |
| 236 The value in rA is arithmetically shifted right by rB bits and stored in rD. The most significant bit of rA is copied | |
| 237 into the newly shifted bits. This allows asr to be used for signed division by powers of 2 as the sign is preserved. | |
| 238 </p> | |
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239 <p> |
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240 <strong>Flags:</strong> C = last bit shifted out of rA, N = result is negative, Z = result is zero |
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241 </p> |
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242 <h4 id="bcc">bCC LABEL</h4> |
| 39 | 243 <p> |
| 244 bCC performs a relative branch if the condition indicated by CC is true. It has a range of 131 instructions forward or | |
| 245 124 instructions backwards. CC must be one of the following values | |
| 246 <table> | |
| 247 <tr> | |
| 248 <th>CC</th> | |
| 249 <th>Mnemonic</th> | |
| 250 <th>Name</th> | |
| 251 <th>Description</th> | |
| 252 </tr> | |
| 253 <tr> | |
| 254 <td>0</td> | |
| 255 <td>ra</td> | |
| 256 <td>bRanch Always</td> | |
| 257 <td>Unconditionall branch</td> | |
| 258 </tr> | |
| 259 <tr> | |
| 260 <td>1</td> | |
| 261 <td>rf</td> | |
| 262 <td>bRanch False</td> | |
| 263 <td>Effectively a nop</td> | |
| 264 </tr> | |
| 265 <tr> | |
| 266 <td>2</td> | |
| 267 <td>eq</td> | |
| 268 <td>EQual</td> | |
| 269 <td>Branch if zero flag is 1</td> | |
| 270 </tr> | |
| 271 <tr> | |
| 272 <td>3</td> | |
| 273 <td>ne</td> | |
| 274 <td>Not Equal</td> | |
| 275 <td>Branch if zero flag is 0</td> | |
| 276 </tr> | |
| 277 <tr> | |
| 278 <td>4</td> | |
| 279 <td>mi</td> | |
| 280 <td>MInus</td> | |
| 281 <td>Branch if negative flag is 1</td> | |
| 282 </tr> | |
| 283 <tr> | |
| 284 <td>5</td> | |
| 285 <td>pl</td> | |
| 286 <td>PLus</td> | |
| 287 <td>Branch if negative flag is 0</td> | |
| 288 </tr> | |
| 289 <tr> | |
| 290 <td>6</td> | |
| 291 <td>cs</td> | |
| 292 <td>Carry Set</td> | |
| 293 <td>Branch if carry flag is 1. Unsigned "less than" when used with cmp</td> | |
| 294 </tr> | |
| 295 <tr> | |
| 296 <td>7</td> | |
| 297 <td>cc</td> | |
| 298 <td>Carry Clear</td> | |
| 299 <td>Branch if carry flag is 1. Unsigned "greater or equal" when used with cmp</td> | |
| 300 </tr> | |
| 301 <tr> | |
| 302 <td>8</td> | |
| 303 <td>gr</td> | |
| 304 <td>Greater</td> | |
| 305 <td>Branch if carry flag is 0 and the zero flag is zero. Unsigned "greater" when used with cmp</td> | |
| 306 </tr> | |
| 307 <tr> | |
| 308 <td>9</td> | |
| 309 <td>le</td> | |
| 310 <td>Less or Equal</td> | |
| 311 <td>Branch if carry flag is 1 or the zero flag is 1. Unsigned "lesser or equal" when used with cmp</td> | |
| 312 </tr> | |
| 313 </table> | |
| 314 Use of CC values greater than 9 will result in an invalid instruction exception. | |
| 315 </p> | |
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316 <p> |
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317 <strong>Flags:</strong> No change |
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318 </p> |
| 39 | 319 <h4 id="mov">mov rA, rD</h4> |
| 320 <p> | |
| 321 Stores the value of rA in rD. This can be used as a return or jump instruction if rD is PC. | |
| 322 </p> | |
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323 <p> |
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324 <strong>Flags:</strong> No change |
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325 </p> |
| 39 | 326 <h4 id="neg">neg rA, rD</h4> |
| 327 <p> | |
| 328 Calculates the 2s complement of rA and stores it in rD. This can be used in combination with add to implement subtraction. | |
| 329 </p> | |
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330 <p> |
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331 <strong>Flags:</strong> C = carry out of bit 15, N = result is negative, Z = result is zero |
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332 </p> |
| 39 | 333 <h4 id="not">not rA, rD</h4> |
| 334 <p> | |
| 335 Calculates the 1s complement of rA and stores it in rD. | |
| 336 </p> | |
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337 <p> |
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338 <strong>Flags:</strong> C = unmodified, N = result is negative, Z = result is zero |
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339 </p> |
| 39 | 340 <h4 id="cmp">cmp rA, rD</h4> |
| 341 <p> | |
| 342 Subtracts rA from rD and discards the result, but still updates flags. | |
| 343 </p> | |
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344 <p> |
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345 <strong>Flags:</strong> C = carry out of bit 15, N = result is negative, Z = result is zero |
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346 </p> |
| 39 | 347 <h4 id="call">call rA, rD</h4> |
| 348 <p> | |
| 349 Stores the address of the next instruction in rD and sets PC to the value in rA. Used for calling subroutines. | |
| 350 </p> | |
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351 <p> |
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352 <strong>Flags:</strong> No change |
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353 </p> |
| 39 | 354 <h4 id="swap">swap rA, rD</h4> |
| 355 <p> | |
| 356 Swaps the values in rA and rD. | |
| 357 </p> | |
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358 <p> |
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359 <strong>Flags:</strong> No change |
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360 </p> |
| 39 | 361 <h4 id="in">in rA, rD</h4> |
| 362 <p> | |
| 363 Reads a word from the IO port indicated by rA and stores it in rD. | |
| 364 </p> | |
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365 <p> |
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366 <strong>Flags:</strong> No change |
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367 </p> |
| 39 | 368 <h4 id="out">out rA, rD</h4> |
| 369 <p> | |
| 370 Writes the word stored in rD to the IO port indicated by rA. | |
| 371 </p> | |
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372 <p> |
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373 <strong>Flags:</strong> No change |
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374 </p> |
| 39 | 375 <h4 id="ini">ini IM, rD</h4> |
| 376 <p> | |
| 377 Reads a word from the IO port indicated by IM and stores it in rD. IM can range from 0 to 15. | |
| 378 </p> | |
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379 <p> |
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380 <strong>Flags:</strong> No change |
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381 </p> |
| 39 | 382 <h4 id="outi">outi</h4> |
| 383 <p> | |
| 384 Writes the word stored in rD to the IO port indicated by IM. IM can range from 0 to 15. | |
| 385 </p> | |
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386 <p> |
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387 <strong>Flags:</strong> No change |
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388 </p> |
| 39 | 389 <h4 id="addi">addi IM, rD</h4> |
| 390 <p> | |
| 391 Adds IM to the value in rD and stores the result in rD. IM range from -8 to -1 or 1 to 8. A value of 0 is used to indicate 8. | |
| 392 </p> | |
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393 <p> |
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394 <strong>Flags:</strong> C = carry out of bit 15, N = result is negative, Z = result is zero |
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395 </p> |
| 39 | 396 <h4 id="andi">andi IM, rD</h4> |
| 397 <p> | |
| 398 Performs a logical and of IM and the value in rD and stores the result in rD. IM can range from -8 to -1 or 1 to 8. A value of 0 is used to indicate 8. | |
| 399 </p> | |
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400 <p> |
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401 <strong>Flags:</strong> C = unmodified, N = result is negative, Z = result is zero |
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402 </p> |
| 39 | 403 <h4 id="ori">ori IM, rD</h4> |
| 404 <p> | |
| 405 Performs a logical or of IM and the value in rD and stores the result in rD. IM can range from-8 to -1 or 1 to 8. A value of 0 is used to indicate 8. | |
| 406 </p> | |
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407 <p> |
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408 <strong>Flags:</strong> C = unmodified, N = result is negative, Z = result is zero |
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409 </p> |
| 39 | 410 <h4 id="lsli">lsli IM, rD</h4> |
| 411 <p> | |
| 412 Shifts the value in rD IM bits to the left. IM can range from 1 to 8. | |
| 413 </p> | |
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414 <p> |
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415 <strong>Flags:</strong> C = last bit shifted out of rA, N = result is negative, Z = result is zero |
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416 </p> |
| 39 | 417 <h4 id="lsri">lsri IM, rD</h4> |
| 418 <p> | |
| 419 Shifts the value in rD IM bits to the right. IM can range from 1 to 8. | |
| 420 </p> | |
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421 <p> |
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422 <strong>Flags:</strong> C = last bit shifted out of rA, N = result is negative, Z = result is zero |
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423 </p> |
| 39 | 424 <h4 id="cmpi">cmpi IM, rd</h4> |
| 425 <p> | |
| 426 Subtracts IM from rD and discards the result, but updates flags. IM can range from -8 to 7. | |
| 427 </p> | |
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428 <p> |
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429 <strong>Flags:</strong> C = carry out of bit 15, N = result is negative, Z = result is zero |
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430 </p> |
| 39 | 431 <h4 id="reti">reti rD</h4> |
| 432 <p> | |
| 433 Sets rD to the value storeed in EUR, SR to the value stored in ESR and PC to the value stored in EPC. This instruction is used for returning from an | |
| 434 exception or interrupt. | |
| 435 </p> | |
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436 <p> |
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437 <strong>Flags:</strong> Updated corresponding to the value in ESR. |
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438 </p> |
| 39 | 439 <h4 id="trap">trap rD</h4> |
| 440 <p> | |
| 441 Causes an exception to be taken to the vector indicated by rD. | |
| 442 </p> | |
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443 <p> |
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444 <strong>Flags:</strong> Condition code flags unchanged, interrupt enable bits cleared. |
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445 </p> |
| 39 | 446 <h4 id="trapi">trapi IM</h4> |
| 447 <p> | |
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448 Causes an exception to be taken to the vector indicated by IM |
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449 </p> |
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450 <p> |
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451 <strong>Flags:</strong> Condition code flags unchanged, interrupt enable bits cleared. |
| 39 | 452 </p> |
| 453 <h4 id="getepc">getepc rD</h4> | |
| 454 <p> | |
| 455 Stores the value of EPC in rD. | |
| 456 </p> | |
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457 <p> |
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458 <strong>Flags:</strong> No change |
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459 </p> |
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460 <h4 id="setepc">setepc rD</h4> |
| 39 | 461 <p> |
| 462 Stores the vaule of rD in EPC. | |
| 463 </p> | |
| 464 <p> | |
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465 <strong>Flags:</strong> No change |
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466 </p> |
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467 <h4 id="getesr">getesr rD</h4> |
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468 <p> |
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469 Stores the value of ESR in rD. |
| 39 | 470 </p> |
| 471 <p> | |
|
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472 <strong>Flags:</strong> No change |
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473 </p> |
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474 <h4 id="setesr">setesr rD</h4> |
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475 <p> |
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476 Stores the value of rD in ESR. |
| 39 | 477 </p> |
| 478 <p> | |
|
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479 <strong>Flags:</strong> No change |
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480 </p> |
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481 <h4 id="geteur">geteur rD</h4> |
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482 <p> |
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483 Stores the value of EUR in rD. |
| 39 | 484 </p> |
| 485 <p> | |
|
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486 <strong>Flags:</strong> No change |
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487 </p> |
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488 <h4 id="seteur">seteur rD</h4> |
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489 <p> |
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490 Stores the value of rd in EUR. |
| 39 | 491 </p> |
| 492 <p> | |
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493 <strong>Flags:</strong> No change |
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494 </p> |
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495 <h4 id="getenum">getenum rD</h4> |
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496 <p> |
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497 Stores the value of ENUM in rD. |
| 39 | 498 </p> |
| 499 <p> | |
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500 <strong>Flags:</strong> No change |
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501 </p> |
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502 <h4 id="setenum">setenum rD</h4> |
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503 <p> |
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504 Stores the value of rd in ENUM. |
| 39 | 505 </p> |
| 506 <p> | |
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507 <strong>Flags:</strong> No change |
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508 </p> |
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509 <h4 id="getvbr">getvbr rD</h4> |
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510 <p> |
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511 Stores the value of VBR in rD. |
| 39 | 512 </p> |
|
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513 <p> |
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514 <strong>Flags:</strong> No change |
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515 </p> |
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516 <h4 id="setvbr">setvbr rD</h4> |
| 39 | 517 <p> |
|
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518 Stores the valueof rD in VBR. |
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519 </p> |
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520 <p> |
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521 <strong>Flags:</strong> No change |
| 39 | 522 </p> |
| 523 <h2 id="video">Video</h2> | |
|
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524 <h3 id="vidover">Overview</h3> |
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525 <p> |
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526 Simple 16 features a tile-based video processor using 8x8 pixel tiles. It supports a single background plane with a fixed width of 64 tiles and configurable height. |
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527 64 sprites can be displayed simultaneously and 20 can be displayed on each line. Each sprite can either be 8x8 or 16x16 pixels and can use either of the first two |
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528 16 color palettes. The background plane can make use of all 4 palettes. |
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529 </p> |
| 39 | 530 <h2 id="audio">Audio</h2> |
|
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531 <h3 id="audover">Overview</h3> |
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532 <p> |
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533 Simple 16 has four square-wave tone generators with a 16-bit period and an 8-bit volume. The special value of 0 for the period causes the volume to be output constantly |
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534 allowing the volume register to be used as a simple 8-bit DAC. |
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535 </p> |
| 39 | 536 <h2 id="timer">Timer</h2> |
|
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537 <h3 id="timeover">Overview</h3> |
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538 <p> |
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539 Simple 16 has a single timer with a 16-bit period. Interrupt 0 is triggered on timer expiration. |
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540 </p> |
| 39 | 541 <h2 id="controllers">Controllers</h2> |
|
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542 <h3 id="contover">Overview</h3> |
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543 <p> |
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544 Simple 16 supports 2 controllers, each with a D-pad and 8 buttons configured in either an SNES (4 action buttons on the face + 2 shoulder buttons + Start and Select) |
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545 or Genesis 6-button controller (6 action buttons on the face + Start and Mode) arrangement. In this document, the buttons are given using the Genesis naming scheme. |
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546 For a controller following the SNES layout, the right trigger is 'C', the left trigger is 'Z' and 'Select' is 'Mode'. |
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547 </p> |
| 39 | 548 <h2 id="serial">Serial Port</h2> |
|
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549 <h3>Overview</h3> |
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550 <p> |
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551 This port can be thought of a simple UART for debugging purposes. In an emulator, a write should result in a byte being written to stdout and a read should return |
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552 a byte read from stdin. This peripheral can be omitted in which case writes should be ignored and reads should return $FFFF. The primary purpose of this port is |
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|
553 to enable easy debugging of the CPU core before other, more complicated, peripherals are working. |
| 39 | 554 <h2 id="cart">Cartridge</h2> |
|
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|
555 <h3>Overview</h3> |
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|
556 <p> |
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|
557 Simple 16 allows for 48KB of flat mapped cartridge ROM. Future revisions may allow banking. |
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558 </p> |
| 39 | 559 </body> |
| 560 </html> |