Mercurial > repos > simple16

annotate simple_console.txt @ 3:08b69e3f9f17

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Fleshed out the video hardware design somewhat
author Michael Pavone <pavone@retrodev.com>
date Fri, 25 Mar 2016 09:06:29 -0700
parents 6204c81e2933
children 8170d60f188b
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1 Key:
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
2 1 = literal 1 bit
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
3 0 = literal 0 bit
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
4 O = opcode bit
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
5 D = destination register bit
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
6 A = source A register bit
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
7 B = source B register bit
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
8
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
9 DDDD AAAA BBBB OOOO
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
10
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
11 0: ldim
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
12 D = destination reg
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
13 A and B form 8-bit immediate value
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
14 1: ldimh
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
15 D = destination reg
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
16 A and B form 8-bit immediate value
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
17 2: ld8
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
18 3: ld16
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
19 4: str8
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
20 5: str16
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
21 6: add
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
22 7: adc
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
23 8: and
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
24 9: or
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
25 A: xor
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
26 B: lsl
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
27 C: lsr
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
28 D: asr
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
29 E: bcc
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
30 F: single source
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
31
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
32
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
33
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
34 DDDD AAAA OOOO 1111
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
35
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
36 single source
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
37
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
38 0: mov
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
39 1: neg
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
40 2: not
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
41 3: cmp
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
42 4: call
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
43 A = register containing pointer to function
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
44 D = register that will store PC value
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
45 5: swap
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
46 6: in
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
47 7: out
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
48 8: ini
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
49 9: outi
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
50 A: addi
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
51 B: andi
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
52 C: ori
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
53 D: ls[lr]i
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
54 MSB of AAAA determines direction
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
55 LS 3 bits determines magnitude
2
6204c81e2933 Revert changes to handling of immediate versions of bitwise instructions. Replace asri with cmpi.
Michael Pavone <pavone@retrodev.com>
parents: 0
diff changeset
56 E: cmpi
0
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
57 F: single reg
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
58
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
59
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
60 DDDD OOOO 1111 1111
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
61
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
62 0: reti - return from interrupt, D = register to restore from uer
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
63 1: trap
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
64 2: trapi
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
65 3: getepc
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
66 4: setepc
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
67 5: getesr
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
68 6: setesr
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
69 7: getenum
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
70 8: setenum
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
71 9: getuer
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
72 A: setuer
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
73 B: getenum
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
74 C: setenum
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
75 E: invalid
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
76 F: invalid
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
77
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
78
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
79 Registers:
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
80
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
81 r0 - r12 : general purpose
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
82 r13 : technically general purpose, but canonically the stack register
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
83 r14 : PC
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
84 r15 : status register
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
85
3
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
86 Special Registers
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
87 epc - Exception PC - Stores PC value to resume to when entering an exception handler
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
88 esr - Exception SR - same as above, but for SR
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
89 eur - Exceptuion User Reg - reg for temporary storage of a reg in a handler, intended to be used for the stack pointer
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
90 enum - Exception Number - holds the number of the most recent exception
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
91
0
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
92 IO: Ports
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
93
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
94 0: Controller 1
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
95 1: Controller 2
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
96 2: Controller 3
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
97 3: Controller 4
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
98
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
99 4: Channel A Freq
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
100 Load value for a 16-bit down-counter
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
101 Polarity of output is switched on transition from 1 to 0
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
102 Value is loaded on cycles where counter is 0
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
103 Special case value of 0 in this register forces polarity to positive
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
104 5: Channel B Freq
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
105 6: Channel C Freq
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
106 7: Channel D Freq
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
107
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
108 8: Channel A/B Vol
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
109 9: Channel C/D Vol
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
110
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
111 A: Timer Freq
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
112 B: "Serial" Debug Port
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
113
3
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
114 C: Write Vertical Scroll : Read Vertical Position
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
115 MMMM MCCC CCCC CFFF
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
116 C = coarse scroll bit
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
117 F = fine scroll bit
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
118 M = mask bit
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
119 controls which bits come directly from register
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
120 and which bits come from the sum of the register
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
121 and the current line number
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
122
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
123 D: Write Horizontal Scroll : Read Horizontal Position
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
124 xxxx xxxC CCCC CFFF
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
125 C = coarse scroll bit
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
126 F = fine scroll bit
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
127 x = unused
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
128 E: Write Dest Address : Read Status
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
129 F: Write Data : Read Data
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
130
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
131
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
132 Name Table Start Address:
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
133 0VVV VVVV VHHH HHH0
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
134
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
135 V = Coarse scroll bit from vertical scroll value
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
136 H = Coarse scroll bit from horizontal scroll value
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
137
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
138 VDP Memory Map
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
139 0000 - 7FFF = Pattern/Name Table RAM
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
140 8000 - FDFF = unused, returns $FFFF
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
141 FE00 - FEFF = Sprite RAM
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
142 FF00 - FF7F = Palette RAM
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
143 FF80 - FFFF = Palette RAM (mirror)
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
144
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
145 Another View -
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
146 MSB determines whether destination is main RAM
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
147 For MSB 1
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
148 Next 7 MSB determines which special RAM is the destination
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
149 Only values of 7E and 7F are valid for these bits at present
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
150 8 LSB determine offset (1 LSB ignored)
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
151
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
152 Writing to Data port puts word into FIFO
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
153 Offset within memory type is increment when word is pulled from FIFO
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
154
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
155 Pattern Format:
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
156 4bpp in an 8x8 tile arrangement
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
157
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
158
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
159 Sprite Table Entry:
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
160
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
161 XXXXXXXX YYYYYYYY
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
162 IXPVHSNN NNNNNNNN
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
163
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
164 S: size -- 0 = 8x8, 1 = 16x16
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
165 P: Palette selector
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
166 H: Horizontal flip
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
167 V: Vertical flip
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
168 I: Priority
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
169 N: Name
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
170 X: X position (left of screen = 16, right of screen = ?)
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
171 Y: Y position (top of screen = 16, bottom of screen = 240)
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
172
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
173
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
174 Name Table Entry:
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
175
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
176 IPPVHxNN NNNNNNNN
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
177
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
178 P: Palette selector
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
179 H: Horizontal flip
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
180 V: Vertical flip
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
181 I: Priority
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
182 N: Name
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
183 x: Unused, should be set to 0
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
184
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
185 26.112 MHZ Clock
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
186 Dot Clock Divider 4
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
187 CPU Clock Divider 20 (assuming 1 cycle/instruction, 5 for 4 cycles/instruction)
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
188 Audio Timer Divider 34
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
189 Audio Output Divider 544
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
190
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
191 Alternatively 13.056 Mhz clock and cut the dividers in half
0
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
192
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
193
7e44f7d5810b Initial commit. CPU working well enough for simple hello world program.
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
194
3
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
195 H-Counter goes from 0-415 and then wraps back to zero
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
196 V-Counter goes from 0-261 and then wraps back to zero
08b69e3f9f17 Fleshed out the video hardware design somewhat
Michael Pavone <pavone@retrodev.com>
parents: 2
diff changeset
197 V-Counter increments when H-Counter wraps