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Re-arrange some VDP writes so that the address register gets setup properly for the FIFO-fill while still avoiding a freeze
author Mike Pavone <pavone@retrodev.com>
date Sun, 08 Sep 2013 17:25:27 -0700
parents 30f1d4c90900
children
comparison
equal deleted inserted replaced
14:166d58b234c3 15:3e2e3129a619
95 95
96 move.l #$0, a7 96 move.l #$0, a7
97 97
98 move.w #$8004, (a5) 98 move.w #$8004, (a5)
99 move.w #$8104, (a5) ;turn off display 99 move.w #$8104, (a5) ;turn off display
100 move.w #$8200, (a5) ;Table A = 0000 100 ;move.w #$8200, (a5) ;Table A = 0000
101 move.w #$8400, (a5) ;Table B = 0000 101 ;move.w #$8400, (a5) ;Table B = 0000
102 move.w #$857C, (a5) ;Sprite Table = F800 102 ;move.w #$857C, (a5) ;Sprite Table = F800
103 move.w #$8B00, (a5) ;set full screen vertical and horizontal scrolling 103 move.w #$8B00, (a5) ;set full screen vertical and horizontal scrolling
104 move.w #$8C01, (a5) ;H40 mode, no shadow/hilight, no interlace 104 move.w #$8C01, (a5) ;H40 mode, no shadow/hilight, no interlace
105 move.w #$8D3F, (a5) ;H Scroll = FC00 105 ;move.w #$8D3F, (a5) ;H Scroll = FC00
106 move.w #$9001, (a5) ;64x32 scroll tables 106 ;move.w #$9001, (a5) ;64x32 scroll tables
107 107
108 108
109 109
110 110
111 111
114 WaitStart: 114 WaitStart:
115 btst.b #5, $a10003 115 btst.b #5, $a10003
116 bne.s WaitStart 116 bne.s WaitStart
117 117
118 Top: 118 Top:
119 move.l #$40000000, (a5) ;Setup VRAM writes
120 119
121 lea BgData(pc), a0 ;set DMA source address 120 lea BgData(pc), a0 ;set DMA source address
122 move.l a0, d7 121 move.l a0, d7
123 sub.l #258, d7 122 sub.l #258, d7
124 move.w #$9500, d6 123 move.w #$9500, d6
131 move.w d6,(a5) 130 move.w d6,(a5)
132 ror.l #8, d7 131 ror.l #8, d7
133 move.b d7, d6 132 move.b d7, d6
134 add.w #$100, d6 133 add.w #$100, d6
135 and.b #$7F, d6 134 and.b #$7F, d6
136 move.w d6,(a5) 135 ;move.w d6,(a5)
136
137
138
137 139
138 move.l #$94AE9342, (a5) ;set DMA length 140 move.l #$94AE9342, (a5) ;set DMA length
139 141
140 move.w #$8F00, (a5) ;set auto-increment to 0 142 move.w #$8F00, (a5) ;set auto-increment to 0
141 143
142 move.w #$8154, (a5) 144 move.w #$8144, (a5) ;display on, DMA off
145 move.l #$40000000, (a5) ;Setup VRAM writes
146
147
143 addq #1, a5 148 addq #1, a5
144 WaitVBlank: 149 WaitVBlank:
145 btst.b #3, (a5) 150 btst.b #3, (a5)
146 beq.s WaitVBlank 151 beq.s WaitVBlank
147 WaitActive: 152 WaitActive:
150 155
151 move.l d0, (a4) ;fill FIFO 156 move.l d0, (a4) ;fill FIFO
152 move.l d0, (a4) 157 move.l d0, (a4)
153 move.w d0, (a4) 158 move.w d0, (a4)
154 subq #1, a5 159 subq #1, a5
155 move.w #$8114, (a5) ;turn off display 160 move.w #$8114, (a5) ;display off, DMA on
161 nop ;let FIFO drain
156 nop 162 nop
157 nop 163 nop
158 nop 164 move.w d6, (a5) ;finish setting DMA source
159 nop
160 move.l #$C0000080, (a5) 165 move.l #$C0000080, (a5)
161 166
162 bra Top 167 bra Top
163 168
164 169