Sun, 01 Jan 2017 23:00:28 -0800 |
Michael Pavone |
Fix slot tracking screwup
|
Sun, 01 Jan 2017 22:47:23 -0800 |
Michael Pavone |
Fix horizontal scrolling in Mode 4
|
Sun, 01 Jan 2017 21:06:32 -0800 |
Michael Pavone |
Update Mode 4 rendering to match logic analyzer captures
|
Sun, 01 Jan 2017 02:33:06 -0800 |
Michael Pavone |
Fix a bug in hslot advancement in Mode 4. Fix some of the "inactive_start" calculations that did not take into account Mode 4.
|
Sun, 01 Jan 2017 01:23:26 -0800 |
Michael Pavone |
Make Mode 4 sprite rendering a little less broken
|
Sun, 01 Jan 2017 01:16:43 -0800 |
Michael Pavone |
Fix rendering of BG color index 0 in Mode 4. Only transparent with respect to sprites and not the backdrop like in Mode 5
|
Sun, 01 Jan 2017 01:10:44 -0800 |
Michael Pavone |
Partial fix for Z80 debugger brokeness introduced with stack alignment changes
|
Wed, 28 Dec 2016 20:39:27 -0800 |
Michael Pavone |
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
|
Wed, 28 Dec 2016 12:28:52 -0800 |
Michael Pavone |
Enabled Z80 debugger in PBC mode
|
Tue, 27 Dec 2016 18:58:31 -0800 |
Michael Pavone |
Detect failures to initialize a system context and report an error rather than crashing
|
Tue, 27 Dec 2016 14:31:27 -0800 |
Michael Pavone |
Fix Mode 4 color mapping
|
Tue, 27 Dec 2016 13:59:01 -0800 |
Michael Pavone |
Clear interrupt status flags after getting the status register value rather than before
|
Tue, 27 Dec 2016 13:46:06 -0800 |
Michael Pavone |
Brighten up Mode 4 colors
|
Tue, 27 Dec 2016 13:38:58 -0800 |
Michael Pavone |
The function of the HVC Latch enable bit in mode register 1 is different when not in mode 5
|