Wed, 19 Dec 2012 20:23:59 -0800 |
Mike Pavone |
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
|
Tue, 18 Dec 2012 23:55:10 -0800 |
Mike Pavone |
Fix operand order for AND instructions
|
Tue, 18 Dec 2012 22:56:04 -0800 |
Mike Pavone |
ecx was getting clobbered before the relevant temp value was used in some cases during memory reads
|
Tue, 18 Dec 2012 22:20:25 -0800 |
Mike Pavone |
Properly zero-init all VDP buffers. Comment out some debug printfs.
|
Tue, 18 Dec 2012 22:19:52 -0800 |
Mike Pavone |
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
|
Tue, 18 Dec 2012 19:51:33 -0800 |
Mike Pavone |
Fix CRAM and possibly VSRAM writes
|
Tue, 18 Dec 2012 19:51:17 -0800 |
Mike Pavone |
Add palette debug to SDL renderer
|
Tue, 18 Dec 2012 02:16:42 -0800 |
Mike Pavone |
Get Flavio's color bar demo kind of sort of working
|
Sun, 16 Dec 2012 22:25:29 -0800 |
Mike Pavone |
Add preliminary support for JMP
|
Sun, 16 Dec 2012 21:57:52 -0800 |
Mike Pavone |
Implement CLR, minor refactor of register offset calculation in context struct
|
Sat, 15 Dec 2012 23:01:32 -0800 |
Mike Pavone |
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
|
Thu, 13 Dec 2012 09:47:40 -0800 |
Mike Pavone |
Fix shift rotate instruction decoding and improve disassembly of move USP and conditional branch instructions
|
Wed, 12 Dec 2012 23:21:11 -0800 |
Mike Pavone |
Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
|
Wed, 12 Dec 2012 21:25:31 -0800 |
Mike Pavone |
Don't try to disassemble addresses beyond the end of the cartridge
|
Wed, 12 Dec 2012 20:43:42 -0800 |
Mike Pavone |
Fix bug in address visitation in disassembler
|
Wed, 12 Dec 2012 20:18:06 -0800 |
Mike Pavone |
Add support for dbcc instruction
|
Wed, 12 Dec 2012 20:17:59 -0800 |
Mike Pavone |
Add vector table to test.s68
|
Wed, 12 Dec 2012 20:17:11 -0800 |
Mike Pavone |
Add logic for following control flow based on logic in the translator
|
Sun, 09 Dec 2012 18:40:45 -0800 |
Mike Pavone |
Add debug render mode and fix vertical flip bit for bg tiles
|
Sun, 09 Dec 2012 17:26:36 -0800 |
Mike Pavone |
Fix bug in tile address masking. Remove some debug code from window plane.
|
Sun, 09 Dec 2012 17:10:08 -0800 |
Mike Pavone |
More correct window support, maybe
|
Sun, 09 Dec 2012 17:05:13 -0800 |
Mike Pavone |
Broken window support
|
Sun, 09 Dec 2012 01:13:41 -0800 |
Mike Pavone |
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
|
Sun, 09 Dec 2012 00:03:15 -0800 |
Mike Pavone |
Implement sprite index >= sprite limit triggers sprite limit behavior
|
Sat, 08 Dec 2012 23:49:51 -0800 |
Mike Pavone |
Initial H32 mode support
|
Sat, 08 Dec 2012 23:09:40 -0800 |
Mike Pavone |
Pass all sprite masking tests
|
Sat, 08 Dec 2012 23:06:13 -0800 |
Mike Pavone |
Small fix to overflow flag
|
Sat, 08 Dec 2012 22:50:14 -0800 |
Mike Pavone |
Improve sprite masking to almost completely pass Nemesis' sprite masking test
|
Sat, 08 Dec 2012 22:07:25 -0800 |
Mike Pavone |
Add support for simple resolution scaling
|
Sat, 08 Dec 2012 21:39:01 -0800 |
Mike Pavone |
Fix horizontal sprite mirroring
|
Sat, 08 Dec 2012 20:25:56 -0800 |
Mike Pavone |
Make horizontal scrolling closer to correct, Comix Zone looks good, Sonic 2 slightly off
|
Sat, 08 Dec 2012 20:02:10 -0800 |
Mike Pavone |
Small cleanup
|
Sat, 08 Dec 2012 19:59:32 -0800 |
Mike Pavone |
Fix horizontal scroll offset
|
Sat, 08 Dec 2012 19:42:07 -0800 |
Mike Pavone |
Fix BG plane B render bug
|
Sat, 08 Dec 2012 16:58:11 -0800 |
Mike Pavone |
Fix sprite transparency for overlapping sprites
|
Sat, 08 Dec 2012 16:46:47 -0800 |
Mike Pavone |
Fix management of context->sprite_draws so the sprite layer only draws when it should
|
Sat, 08 Dec 2012 16:16:18 -0800 |
Mike Pavone |
Fix vertical scroll value for plane B
|
Sat, 08 Dec 2012 16:09:43 -0800 |
Mike Pavone |
Partially fix BG plane B
|
Sat, 08 Dec 2012 16:02:17 -0800 |
Mike Pavone |
Fix endianness of VSRAM when read from Genecyst save state
|
Sat, 08 Dec 2012 11:59:50 -0800 |
Mike Pavone |
Sprites fixed, working on bg planes
|
Sat, 08 Dec 2012 11:12:17 -0800 |
Mike Pavone |
Sprites somewhat less broken
|
Sat, 08 Dec 2012 02:00:54 -0800 |
Mike Pavone |
Mostly broken VDP core and savestate viewer
|
Tue, 04 Dec 2012 19:25:54 -0800 |
Mike Pavone |
Initial support for M68k reset vector, rather than starting at an arbitrary address
|
Tue, 04 Dec 2012 19:13:12 -0800 |
Mike Pavone |
M68K to x86 translation works for a limited subset of instructions and addressing modes
|
Tue, 27 Nov 2012 22:54:38 -0800 |
Mike Pavone |
Add asssembly runtime code stub
|
Tue, 27 Nov 2012 22:50:09 -0800 |
Mike Pavone |
Add Makefile
|
Tue, 27 Nov 2012 22:43:32 -0800 |
Mike Pavone |
Make x86 generator generic with respect to operand size for immediate parameters.
|
Tue, 27 Nov 2012 09:28:13 -0800 |
Mike Pavone |
x86 code gen, initial work on translator
|
Thu, 15 Nov 2012 22:15:43 -0800 |
Mike Pavone |
Improve disassembly. FIx some decoding bugs.
|
Thu, 15 Nov 2012 00:52:53 -0800 |
Mike Pavone |
Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
|
Wed, 14 Nov 2012 23:04:55 -0800 |
Mike Pavone |
Implement OR_DIV_SBCD group in decoder
|
Wed, 14 Nov 2012 09:24:40 -0800 |
Mike Pavone |
Added new OPSIZE for unsized instructions so they can be properly disassembled without making them special cases
|
Tue, 13 Nov 2012 18:26:43 -0800 |
Mike Pavone |
Implement (possibly broken) decoding of all M68000 instructions not in the OR_DIV_SBCD group
|
Fri, 09 Nov 2012 22:01:26 -0800 |
Mike Pavone |
Finish bit/movep/immediate group except for 68020 instructions
|
Tue, 06 Nov 2012 02:07:45 -0800 |
Mike Pavone |
merge
|
Tue, 06 Nov 2012 01:57:36 -0800 |
Mike Pavone |
Add some logic analyzer captures, a Python script for analyzing said captures and a higher level analysis of the output
|