Mercurial > repos > blastem
log
| age | author | description |
|---|---|---|
| Fri, 04 Jan 2013 22:51:01 -0800 | Mike Pavone | Small fix for bit instructions |
| Fri, 04 Jan 2013 21:47:09 -0800 | Mike Pavone | Implement access to Z80 RAM |
| Thu, 03 Jan 2013 22:49:21 -0800 | Mike Pavone | Implement TRAP (untested) |
| Thu, 03 Jan 2013 22:07:40 -0800 | Mike Pavone | Implement MULU/MULS and DIVU/DIVS |
| Tue, 01 Jan 2013 09:40:17 -0800 | Mike Pavone | Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed. |
| Tue, 01 Jan 2013 07:06:57 -0800 | Mike Pavone | Make writes to control and data port block when DMA is in progress |
| Tue, 01 Jan 2013 07:04:48 -0800 | Mike Pavone | Bail out of disassembly of a particular stream when we hit an invalid instruction |