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Fri, 21 Apr 2017 01:19:40 -0700
Michael Pavone
Minor optimization to avoid invalidating translated code when the bank has not actually changed. Makes a nasty edge case in the 68K debugger slightly less severe when dealing with code that uses banking
Thu, 20 Apr 2017 22:28:58 -0700
Michael Pavone
Fixed timing for RTS and RTE
Tue, 18 Apr 2017 19:27:10 -0700
Michael Pavone
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Mon, 17 Apr 2017 23:58:21 -0700
Michael Pavone
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Mon, 17 Apr 2017 20:54:33 -0700
Michael Pavone
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Sun, 16 Apr 2017 18:43:34 -0700
Michael Pavone
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Sun, 16 Apr 2017 16:40:04 -0700
Michael Pavone
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
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