Wed, 20 Feb 2019 09:42:12 -0800 |
Michael Pavone |
Fix Z80 interrupts in Gen/MD mode when using new core. Disable CPU debug log in new Z80 core
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Wed, 20 Feb 2019 00:34:52 -0800 |
Michael Pavone |
Fix calculation for whether coalesceFlags is needed for xchg instruction in CPU DSL
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Wed, 20 Feb 2019 00:16:27 -0800 |
Michael Pavone |
A couple more instruction timing fixes in new Z80 core
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Tue, 19 Feb 2019 23:14:38 -0800 |
Michael Pavone |
Fix implementation of halt in new Z80 core
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Tue, 19 Feb 2019 22:59:30 -0800 |
Michael Pavone |
Small fix to ztestrun rule in makefile
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Tue, 19 Feb 2019 22:59:14 -0800 |
Michael Pavone |
Fix cycle counts of a few instructions in old Z80 core
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Tue, 19 Feb 2019 22:51:53 -0800 |
Michael Pavone |
Add emulated MHz output to blastcpm
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Tue, 19 Feb 2019 22:51:33 -0800 |
Michael Pavone |
Store sync_cycle in context rather than in a local in CPU DSL. Fix the timing of a number of instructions in new Z80 core
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Tue, 19 Feb 2019 07:03:57 +0000 |
Michael Pavone |
Fix build
mame_interp
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Sat, 16 Feb 2019 13:15:09 -0800 |
Michael Pavone |
Fix size of relocated Z80 bank register field
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Fri, 15 Feb 2019 23:59:34 -0800 |
Michael Pavone |
Added in block instructions, fixed IO address calculation in out block instructions in new Z80 core
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Fri, 15 Feb 2019 23:58:55 -0800 |
Michael Pavone |
Add appropriate cycles for IO access
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Fri, 15 Feb 2019 23:58:34 -0800 |
Michael Pavone |
Basic support for string operands in CPU DSL
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Tue, 12 Feb 2019 09:58:04 -0800 |
Michael Pavone |
Integration of new Z80 core is sort of working now
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Sun, 10 Feb 2019 11:58:23 -0800 |
Michael Pavone |
Initial attempt at interrupts in new Z80 core and integrating it into main executable
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