Sat, 11 May 2013 01:38:57 -0700 |
Mike Pavone |
Port instruction retranslation improvements from Z80 core to M68K core
|
Fri, 10 May 2013 23:16:06 -0700 |
Mike Pavone |
Implement hblank flag in status register
|
Fri, 10 May 2013 22:57:56 -0700 |
Mike Pavone |
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
|
Thu, 09 May 2013 20:59:49 -0700 |
Mike Pavone |
Add YM2612 stubs to transz80
|
Thu, 09 May 2013 20:09:49 -0700 |
Mike Pavone |
Fix return address for RST
|
Thu, 09 May 2013 19:38:28 -0700 |
Mike Pavone |
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
|
Thu, 09 May 2013 19:24:18 -0700 |
Mike Pavone |
Fix terminal instruction detection in disassembler
|
Thu, 09 May 2013 18:36:21 -0700 |
Mike Pavone |
Properly handle instructions that use boty IYH and IYL
|
Thu, 09 May 2013 00:33:06 -0700 |
Mike Pavone |
Set the N flag to the correct value for DEC instructions
|
Thu, 09 May 2013 00:30:55 -0700 |
Mike Pavone |
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
|
Thu, 09 May 2013 00:17:12 -0700 |
Mike Pavone |
Correctly set the N flag for SBC
|
Thu, 09 May 2013 00:14:54 -0700 |
Mike Pavone |
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
|
Wed, 08 May 2013 23:44:49 -0700 |
Mike Pavone |
Complete flag behavior for Z80 BIT instruction
|
Wed, 08 May 2013 23:31:19 -0700 |
Mike Pavone |
Properly handle negative displacements in Z80 core
|