Mercurial > repos > blastem
changeset 2499:d74d3998482c
Make some progress on compiling full emulator with new 68K core
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Tue, 30 Apr 2024 00:02:14 -0700 |
| parents | dffda054d218 |
| children | d44fe974fb85 |
| files | blastem.c cpu_dsl.py debug.c debug.h gdb_remote.c genesis.c genesis.h jcart.c m68k.cpu m68k_core.c m68k_core.h m68k_core_x86.c m68k_util.c menu.c multi_game.c nor.c sega_mapper.c segacd.c trans.c xband.c |
| diffstat | 20 files changed, 379 insertions(+), 356 deletions(-) [+] |
line wrap: on
line diff
--- a/blastem.c Mon Apr 29 22:57:49 2024 -0700 +++ b/blastem.c Tue Apr 30 00:02:14 2024 -0700 @@ -10,12 +10,6 @@ #include "system.h" #include "68kinst.h" -#include "m68k_core.h" -#ifdef NEW_CORE -#include "z80.h" -#else -#include "z80_to_x86.h" -#endif #include "mem.h" #include "vdp.h" #include "render.h"
--- a/cpu_dsl.py Mon Apr 29 22:57:49 2024 -0700 +++ b/cpu_dsl.py Tue Apr 30 00:02:14 2024 -0700 @@ -1598,6 +1598,7 @@ hFile.write('\n#include "backend.h"') hFile.write('\n\ntypedef struct {') hFile.write('\n\tcpu_options gen;') + hFile.write('\n\tuint8_t address_log;') hFile.write('\n}} {0}options;'.format(self.prefix)) hFile.write('\n\ntypedef struct {') hFile.write('\n\t{0}options *opts;'.format(self.prefix)) @@ -1606,6 +1607,8 @@ hFile.write('\n') hFile.write('\nvoid {pre}execute({type} *context, uint32_t target_cycle);'.format(pre = self.prefix, type = self.context_type)) for decl in self.declares: + if decl.startswith('define '): + decl = '#' + decl hFile.write('\n' + decl) hFile.write('\n#endif //{0}_'.format(macro)) hFile.write('\n')
--- a/debug.c Mon Apr 29 22:57:49 2024 -0700 +++ b/debug.c Tue Apr 30 00:02:14 2024 -0700 @@ -1535,12 +1535,12 @@ static uint8_t m68k_read_byte(uint32_t address, m68k_context *context) { //TODO: share this implementation with GDB debugger - return read_byte(address, (void **)context->mem_pointers, &context->options->gen, context); + return read_byte(address, (void **)context->mem_pointers, &context->opts->gen, context); } static uint16_t m68k_read_word(uint32_t address, m68k_context *context) { - return read_word(address, (void **)context->mem_pointers, &context->options->gen, context); + return read_word(address, (void **)context->mem_pointers, &context->opts->gen, context); } static uint32_t m68k_read_long(uint32_t address, m68k_context *context) @@ -1573,20 +1573,20 @@ { m68k_context *context = root->cpu_context; if (size == 'b') { - write_byte(address, value, (void **)context->mem_pointers, &context->options->gen, context); + write_byte(address, value, (void **)context->mem_pointers, &context->opts->gen, context); } else if (size == 'l') { if (address & 1) { fprintf(stderr, "Longword access to odd addresses ($%X) is not allowed\n", address); return 0; } - write_word(address, value >> 16, (void **)context->mem_pointers, &context->options->gen, context); - write_word(address + 2, value, (void **)context->mem_pointers, &context->options->gen, context); + write_word(address, value >> 16, (void **)context->mem_pointers, &context->opts->gen, context); + write_word(address + 2, value, (void **)context->mem_pointers, &context->opts->gen, context); } else { if (address & 1) { fprintf(stderr, "Wword access to odd addresses ($%X) is not allowed\n", address); return 0; } - write_word(address, value, (void **)context->mem_pointers, &context->options->gen, context); + write_word(address, value, (void **)context->mem_pointers, &context->opts->gen, context); } return 1; } @@ -1655,7 +1655,7 @@ static debug_val m68k_cycle_get(debug_var *var) { m68k_context *context = var->ptr; - return debug_int(context->current_cycle); + return debug_int(context->cycles); } static debug_val m68k_usp_get(debug_var *var) @@ -3589,8 +3589,8 @@ if (debugging) { printf("VDP Register Breakpoint %d hit on register write $%X - Old: $%X, New: $%X\n", (*this_bp)->index, reg, context->regs[reg], value); gen->header.enter_debugger = 1; - if (gen->m68k->sync_cycle > gen->m68k->current_cycle + 1) { - gen->m68k->sync_cycle = gen->m68k->current_cycle + 1; + if (gen->m68k->sync_cycle > gen->m68k->cycles + 1) { + gen->m68k->sync_cycle = gen->m68k->cycles + 1; } if (gen->m68k->target_cycle > gen->m68k->sync_cycle) { gen->m68k->target_cycle = gen->m68k->sync_cycle; @@ -3746,7 +3746,7 @@ uint8_t non_adr_count = 0; do { uint32_t bt_address = m68k_instruction_fetch(stack, context); - bt_address = get_instruction_start(context->options, bt_address - 2); + bt_address = get_instruction_start(context->opts, bt_address - 2); if (bt_address) { stack += 4; non_adr_count = 0; @@ -4804,11 +4804,11 @@ static uint32_t m68k_chunk_end(debug_root *root, uint32_t start_address) { m68k_context *m68k = root->cpu_context; - memmap_chunk const *chunk = find_map_chunk(start_address, &m68k->options->gen, 0, NULL); + memmap_chunk const *chunk = find_map_chunk(start_address, &m68k->opts->gen, 0, NULL); if (!chunk) { return start_address; } - if (chunk->mask == m68k->options->gen.address_mask) { + if (chunk->mask == m68k->opts->gen.address_mask) { return chunk->end; } return (start_address & ~chunk->mask) + chunk->mask + 1; @@ -5382,7 +5382,7 @@ init_terminal(); - context->options->sync_components(context, 0); + context->opts->sync_components(context, 0); debug_root *root = find_m68k_root(context); if (!root) { return;
--- a/debug.h Mon Apr 29 22:57:49 2024 -0700 +++ b/debug.h Tue Apr 30 00:02:14 2024 -0700 @@ -3,10 +3,11 @@ #include <stdint.h> #include "tern.h" -#include "m68k_core.h" #ifdef NEW_CORE +#include "m68k.h" #include "z80.h" #else +#include "m68k_core.h" #include "z80_to_x86.h" #endif #include "disasm.h"
--- a/gdb_remote.c Mon Apr 29 22:57:49 2024 -0700 +++ b/gdb_remote.c Tue Apr 30 00:02:14 2024 -0700 @@ -128,14 +128,14 @@ static uint8_t m68k_read_byte(m68k_context *context, uint32_t address) { //TODO: share this implementation with builtin debugger - return read_byte(address, (void **)context->mem_pointers, &context->options->gen, context); + return read_byte(address, (void **)context->mem_pointers, &context->opts->gen, context); } void m68k_write_byte(m68k_context * context, uint32_t address, uint8_t value) { genesis_context *gen = context->system; //TODO: Use generated read/write functions so that memory map is properly respected - uint16_t * word = get_native_pointer(address & 0xFFFFFFFE, (void **)context->mem_pointers, &context->options->gen); + uint16_t * word = get_native_pointer(address & 0xFFFFFFFE, (void **)context->mem_pointers, &context->opts->gen); if (word) { if (address & 1) { *word = (*word & 0xFF00) | value;
--- a/genesis.c Mon Apr 29 22:57:49 2024 -0700 +++ b/genesis.c Tue Apr 30 00:02:14 2024 -0700 @@ -142,7 +142,7 @@ gen->header.save_state = SERIALIZE_SLOT+1; while (!gen->serialize_tmp) { - gen->m68k->target_cycle = gen->m68k->current_cycle + 1; + gen->m68k->target_cycle = gen->m68k->cycles + 1; resume_68k(gen->m68k); } if (size_out) { @@ -154,8 +154,8 @@ } else { serialize_buffer state; init_serialize(&state); - uint32_t address = read_word(4, (void **)gen->m68k->mem_pointers, &gen->m68k->options->gen, gen->m68k) << 16; - address |= read_word(6, (void **)gen->m68k->mem_pointers, &gen->m68k->options->gen, gen->m68k); + uint32_t address = read_word(4, (void **)gen->m68k->mem_pointers, &gen->m68k->opts->gen, gen->m68k) << 16; + address |= read_word(6, (void **)gen->m68k->mem_pointers, &gen->m68k->opts->gen, gen->m68k); genesis_serialize(gen, &state, address, 1); if (size_out) { *size_out = state.size; @@ -189,7 +189,7 @@ static void update_z80_bank_pointer(genesis_context *gen) { if (gen->z80_bank_reg < 0x140) { - gen->z80->mem_pointers[1] = get_native_pointer(gen->z80_bank_reg << 15, (void **)gen->m68k->mem_pointers, &gen->m68k->options->gen); + gen->z80->mem_pointers[1] = get_native_pointer(gen->z80_bank_reg << 15, (void **)gen->m68k->mem_pointers, &gen->m68k->opts->gen); } else { gen->z80->mem_pointers[1] = NULL; } @@ -208,7 +208,7 @@ } else { //save state is from an older version of BlastEm that lacks these fields //set them to reasonable values - gen->last_sync_cycle = gen->m68k->current_cycle; + gen->last_sync_cycle = gen->m68k->cycles; gen->refresh_counter = 0; } } @@ -303,16 +303,16 @@ if (address >= word_ram && address < word_ram_end) { //FIXME: first word should just be garbage if (!cd->has_vdp_dma_value) { - cd->vdp_dma_value = read_word(genesis->m68k->last_prefetch_address, (void **)genesis->m68k->mem_pointers, &genesis->m68k->options->gen, genesis->m68k); + cd->vdp_dma_value = read_word(genesis->m68k->last_prefetch_address, (void **)genesis->m68k->mem_pointers, &genesis->m68k->opts->gen, genesis->m68k); cd->has_vdp_dma_value = 1; } uint16_t ret = cd->vdp_dma_value; - cd->vdp_dma_value = read_word(address, (void **)genesis->m68k->mem_pointers, &genesis->m68k->options->gen, genesis->m68k); + cd->vdp_dma_value = read_word(address, (void **)genesis->m68k->mem_pointers, &genesis->m68k->opts->gen, genesis->m68k); return ret; } } - return read_word(address, (void **)genesis->m68k->mem_pointers, &genesis->m68k->options->gen, genesis->m68k); + return read_word(address, (void **)genesis->m68k->mem_pointers, &genesis->m68k->opts->gen, genesis->m68k); } void vdp_dma_started(void) @@ -335,8 +335,8 @@ { //static int old_int_cycle = CYCLE_NEVER; genesis_context *gen = context->system; - if (context->sync_cycle - context->current_cycle > gen->max_cycles) { - context->sync_cycle = context->current_cycle + gen->max_cycles; + if (context->sync_cycle - context->cycles > gen->max_cycles) { + context->sync_cycle = context->cycles + gen->max_cycles; } context->int_cycle = CYCLE_NEVER; uint8_t mask = context->status & 0x7; @@ -349,7 +349,7 @@ if (mask < 4) { uint32_t next_hint = vdp_next_hint(v_context); if (next_hint != CYCLE_NEVER) { - next_hint = next_hint < context->current_cycle ? context->current_cycle : next_hint; + next_hint = next_hint < context->cycles ? context->cycles : next_hint; if (next_hint < context->int_cycle) { context->int_cycle = next_hint; context->int_num = 4; @@ -357,14 +357,14 @@ } } if (mask < 2 && (v_context->regs[REG_MODE_3] & BIT_EINT_EN) && gen->header.type == SYSTEM_GENESIS) { - uint32_t next_eint_port0 = io_next_interrupt(gen->io.ports, context->current_cycle); - uint32_t next_eint_port1 = io_next_interrupt(gen->io.ports + 1, context->current_cycle); - uint32_t next_eint_port2 = io_next_interrupt(gen->io.ports + 2, context->current_cycle); + uint32_t next_eint_port0 = io_next_interrupt(gen->io.ports, context->cycles); + uint32_t next_eint_port1 = io_next_interrupt(gen->io.ports + 1, context->cycles); + uint32_t next_eint_port2 = io_next_interrupt(gen->io.ports + 2, context->cycles); uint32_t next_eint = next_eint_port0 < next_eint_port1 ? (next_eint_port0 < next_eint_port2 ? next_eint_port0 : next_eint_port2) : (next_eint_port1 < next_eint_port2 ? next_eint_port1 : next_eint_port2); if (next_eint != CYCLE_NEVER) { - next_eint = next_eint < context->current_cycle ? context->current_cycle : next_eint; + next_eint = next_eint < context->cycles ? context->cycles : next_eint; if (next_eint < context->int_cycle) { context->int_cycle = next_eint; context->int_num = 2; @@ -373,42 +373,42 @@ } } } - if (context->int_cycle > context->current_cycle && context->int_pending == INT_PENDING_SR_CHANGE) { + if (context->int_cycle > context->cycles && context->int_pending == INT_PENDING_SR_CHANGE) { context->int_pending = INT_PENDING_NONE; } /*if (context->int_cycle != old_int_cycle) { - printf("int cycle changed to: %d, level: %d @ %d(%d), frame: %d, vcounter: %d, hslot: %d, mask: %d, hint_counter: %d\n", context->int_cycle, context->int_num, v_context->cycles, context->current_cycle, v_context->frame, v_context->vcounter, v_context->hslot, context->status & 0x7, v_context->hint_counter); + printf("int cycle changed to: %d, level: %d @ %d(%d), frame: %d, vcounter: %d, hslot: %d, mask: %d, hint_counter: %d\n", context->int_cycle, context->int_num, v_context->cycles, context->cycles, v_context->frame, v_context->vcounter, v_context->hslot, context->status & 0x7, v_context->hint_counter); old_int_cycle = context->int_cycle; }*/ if (context->status & M68K_STATUS_TRACE || context->trace_pending) { - context->target_cycle = context->current_cycle; + context->target_cycle = context->cycles; return; } context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle; if (context->should_return || gen->header.enter_debugger || context->wp_hit) { - context->target_cycle = context->current_cycle; - } else if (context->target_cycle < context->current_cycle) { + context->target_cycle = context->cycles; + } else if (context->target_cycle < context->cycles) { //Changes to SR can result in an interrupt cycle that's in the past //This can cause issues with the implementation of STOP though - context->target_cycle = context->current_cycle; + context->target_cycle = context->cycles; } if (context->target_cycle == context->int_cycle) { //Currently delays from Z80 access and refresh are applied only when we sync //this can cause extra latency when it comes to interrupts //to prevent this code forces some extra synchronization in the period immediately before an interrupt - if ((context->target_cycle - context->current_cycle) > gen->int_latency_prev1) { + if ((context->target_cycle - context->cycles) > gen->int_latency_prev1) { context->target_cycle = context->sync_cycle = context->int_cycle - gen->int_latency_prev1; - } else if ((context->target_cycle - context->current_cycle) > gen->int_latency_prev2) { + } else if ((context->target_cycle - context->cycles) > gen->int_latency_prev2) { context->target_cycle = context->sync_cycle = context->int_cycle - gen->int_latency_prev2; } else { - context->target_cycle = context->sync_cycle = context->current_cycle; + context->target_cycle = context->sync_cycle = context->cycles; } } /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n", - context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7), + context->cycles, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7), v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/ } @@ -448,7 +448,7 @@ #endif if (gen->enter_z80_debugger && !z_context->reset && !z_context->busack) { while (!z_context->pc) { - z80_run(z_context, z_context->current_cycle + 4); + z80_run(z_context, z_context->Z80_CYCLE + 4); } gen->enter_z80_debugger = 0; #ifndef IS_LIB @@ -492,16 +492,16 @@ { uint32_t interval = MCLKS_PER_68K * REFRESH_INTERVAL; genesis_context *gen = context->system; - gen->refresh_counter += context->current_cycle - gen->last_sync_cycle; - gen->last_sync_cycle = context->current_cycle; - context->current_cycle += REFRESH_DELAY * MCLKS_PER_68K * (gen->refresh_counter / interval); + gen->refresh_counter += context->cycles - gen->last_sync_cycle; + gen->last_sync_cycle = context->cycles; + context->cycles += REFRESH_DELAY * MCLKS_PER_68K * (gen->refresh_counter / interval); gen->refresh_counter = gen->refresh_counter % interval; } void gen_update_refresh_free_access(m68k_context *context) { genesis_context *gen = context->system; - uint32_t before = context->current_cycle - 4*MCLKS_PER_68K; + uint32_t before = context->cycles - 4*MCLKS_PER_68K; if (before < gen->last_sync_cycle) { return; } @@ -514,9 +514,9 @@ gen->refresh_counter = gen->refresh_counter % interval; gen->refresh_counter += delay; delay += REFRESH_DELAY * MCLKS_PER_68K * (gen->refresh_counter / interval); - context->current_cycle += delay; + context->cycles += delay; } - gen->last_sync_cycle = context->current_cycle; + gen->last_sync_cycle = context->cycles; //advance refresh counter for the current access, but don't generate delays gen->refresh_counter += 4*MCLKS_PER_68K; gen->refresh_counter = gen->refresh_counter % interval; @@ -526,8 +526,8 @@ { uint32_t interval = MCLKS_PER_68K * REFRESH_INTERVAL; genesis_context *gen = context->system; - gen->refresh_counter += context->current_cycle - gen->last_sync_cycle; - gen->last_sync_cycle = context->current_cycle; + gen->refresh_counter += context->cycles - gen->last_sync_cycle; + gen->last_sync_cycle = context->cycles; gen->refresh_counter = gen->refresh_counter % interval; } @@ -546,7 +546,7 @@ gen_update_refresh(context); } - uint32_t mclks = context->current_cycle; + uint32_t mclks = context->cycles; sync_z80(gen, mclks); sync_sound(gen, mclks); vdp_run_context(v_context, mclks); @@ -588,16 +588,16 @@ exit_after -= elapsed; } } - if (context->current_cycle > MAX_NO_ADJUST) { + if (context->cycles > MAX_NO_ADJUST) { uint32_t deduction = mclks - ADJUST_BUFFER; vdp_adjust_cycles(v_context, deduction); - io_adjust_cycles(gen->io.ports, context->current_cycle, deduction); - io_adjust_cycles(gen->io.ports+1, context->current_cycle, deduction); - io_adjust_cycles(gen->io.ports+2, context->current_cycle, deduction); + io_adjust_cycles(gen->io.ports, context->cycles, deduction); + io_adjust_cycles(gen->io.ports+1, context->cycles, deduction); + io_adjust_cycles(gen->io.ports+2, context->cycles, deduction); if (gen->mapper_type == MAPPER_JCART) { jcart_adjust_cycles(gen, deduction); } - context->current_cycle -= deduction; + context->cycles -= deduction; z80_adjust_cycles(z_context, deduction); ym_adjust_cycles(gen->ym, deduction); if (gen->ym->vgm) { @@ -619,9 +619,9 @@ } gen->frame_end = vdp_cycles_to_frame_end(v_context); context->sync_cycle = gen->frame_end; - //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot); + //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->cycles, v_context->vcounter, v_context->hslot); if (!address && (gen->header.enter_debugger || gen->header.save_state)) { - context->sync_cycle = context->current_cycle + 1; + context->sync_cycle = context->cycles + 1; } adjust_int_cycle(context, v_context); if (gen->reset_cycle < context->target_cycle) { @@ -664,10 +664,10 @@ if (slot == SERIALIZE_SLOT) { gen->serialize_tmp = state.data; gen->serialize_size = state.size; - context->sync_cycle = context->current_cycle; + context->sync_cycle = context->cycles; context->should_return = 1; } else if (slot == EVENTLOG_SLOT) { - event_state(context->current_cycle, &state); + event_state(context->cycles, &state); } else { save_to_file(&state, save_path); free(state.data); @@ -680,7 +680,7 @@ } free(save_path); } else if(gen->header.save_state) { - context->sync_cycle = context->current_cycle + 1; + context->sync_cycle = context->cycles + 1; } } return context; @@ -707,8 +707,8 @@ static void adjust_int_cycle_pico(m68k_context *context, vdp_context *v_context) { genesis_context *gen = context->system; - if (context->sync_cycle - context->current_cycle > gen->max_cycles) { - context->sync_cycle = context->current_cycle + gen->max_cycles; + if (context->sync_cycle - context->cycles > gen->max_cycles) { + context->sync_cycle = context->cycles + gen->max_cycles; } context->int_cycle = CYCLE_NEVER; uint8_t mask = context->status & 0x7; @@ -721,7 +721,7 @@ if (mask < 5) { uint32_t next_hint = vdp_next_hint(v_context); if (next_hint != CYCLE_NEVER) { - next_hint = next_hint < context->current_cycle ? context->current_cycle : next_hint; + next_hint = next_hint < context->cycles ? context->cycles : next_hint; if (next_hint < context->int_cycle) { context->int_cycle = next_hint; context->int_num = 5; @@ -730,14 +730,14 @@ } if (mask < 4) { if (v_context->regs[REG_MODE_3] & BIT_EINT_EN) { - uint32_t next_eint_port0 = io_next_interrupt(gen->io.ports, context->current_cycle); - uint32_t next_eint_port1 = io_next_interrupt(gen->io.ports + 1, context->current_cycle); - uint32_t next_eint_port2 = io_next_interrupt(gen->io.ports + 2, context->current_cycle); + uint32_t next_eint_port0 = io_next_interrupt(gen->io.ports, context->cycles); + uint32_t next_eint_port1 = io_next_interrupt(gen->io.ports + 1, context->cycles); + uint32_t next_eint_port2 = io_next_interrupt(gen->io.ports + 2, context->cycles); uint32_t next_eint = next_eint_port0 < next_eint_port1 ? (next_eint_port0 < next_eint_port2 ? next_eint_port0 : next_eint_port2) : (next_eint_port1 < next_eint_port2 ? next_eint_port1 : next_eint_port2); if (next_eint != CYCLE_NEVER) { - next_eint = next_eint < context->current_cycle ? context->current_cycle : next_eint; + next_eint = next_eint < context->cycles ? context->cycles : next_eint; if (next_eint < context->int_cycle) { context->int_cycle = next_eint; context->int_num = 2; @@ -762,37 +762,37 @@ } } } - if (context->int_cycle > context->current_cycle && context->int_pending == INT_PENDING_SR_CHANGE) { + if (context->int_cycle > context->cycles && context->int_pending == INT_PENDING_SR_CHANGE) { context->int_pending = INT_PENDING_NONE; } /*if (context->int_cycle != old_int_cycle) { - printf("int cycle changed to: %d, level: %d @ %d(%d), frame: %d, vcounter: %d, hslot: %d, mask: %d, hint_counter: %d\n", context->int_cycle, context->int_num, v_context->cycles, context->current_cycle, v_context->frame, v_context->vcounter, v_context->hslot, context->status & 0x7, v_context->hint_counter); + printf("int cycle changed to: %d, level: %d @ %d(%d), frame: %d, vcounter: %d, hslot: %d, mask: %d, hint_counter: %d\n", context->int_cycle, context->int_num, v_context->cycles, context->cycles, v_context->frame, v_context->vcounter, v_context->hslot, context->status & 0x7, v_context->hint_counter); old_int_cycle = context->int_cycle; }*/ if (context->status & M68K_STATUS_TRACE || context->trace_pending) { - context->target_cycle = context->current_cycle; + context->target_cycle = context->cycles; return; } context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle; if (context->should_return || gen->header.enter_debugger || context->wp_hit) { - context->target_cycle = context->current_cycle; - } else if (context->target_cycle < context->current_cycle) { + context->target_cycle = context->cycles; + } else if (context->target_cycle < context->cycles) { //Changes to SR can result in an interrupt cycle that's in the past //This can cause issues with the implementation of STOP though - context->target_cycle = context->current_cycle; + context->target_cycle = context->cycles; } if (context->target_cycle == context->int_cycle) { //Currently delays from Z80 access and refresh are applied only when we sync //this can cause extra latency when it comes to interrupts //to prevent this code forces some extra synchronization in the period immediately before an interrupt - if ((context->target_cycle - context->current_cycle) > gen->int_latency_prev1) { + if ((context->target_cycle - context->cycles) > gen->int_latency_prev1) { context->target_cycle = context->sync_cycle = context->int_cycle - gen->int_latency_prev1; - } else if ((context->target_cycle - context->current_cycle) > gen->int_latency_prev2) { + } else if ((context->target_cycle - context->cycles) > gen->int_latency_prev2) { context->target_cycle = context->sync_cycle = context->int_cycle - gen->int_latency_prev2; } else { - context->target_cycle = context->sync_cycle = context->current_cycle; + context->target_cycle = context->sync_cycle = context->cycles; } } @@ -808,7 +808,7 @@ gen_update_refresh(context); } - uint32_t mclks = context->current_cycle; + uint32_t mclks = context->cycles; sync_sound_pico(gen, mclks); vdp_run_context(v_context, mclks); if (mclks >= gen->reset_cycle) { @@ -843,13 +843,13 @@ exit_after -= elapsed; } } - if (context->current_cycle > MAX_NO_ADJUST) { + if (context->cycles > MAX_NO_ADJUST) { uint32_t deduction = mclks - ADJUST_BUFFER; vdp_adjust_cycles(v_context, deduction); if (gen->mapper_type == MAPPER_JCART) { jcart_adjust_cycles(gen, deduction); } - context->current_cycle -= deduction; + context->cycles -= deduction; if (gen->psg->vgm) { vgm_adjust_cycles(gen->psg->vgm, deduction); } @@ -873,9 +873,9 @@ } gen->frame_end = vdp_cycles_to_frame_end(v_context); context->sync_cycle = gen->frame_end; - //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot); + //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->cycles, v_context->vcounter, v_context->hslot); if (!address && (gen->header.enter_debugger || gen->header.save_state)) { - context->sync_cycle = context->current_cycle + 1; + context->sync_cycle = context->cycles + 1; } adjust_int_cycle_pico(context, v_context); if (gen->reset_cycle < context->target_cycle) { @@ -905,10 +905,10 @@ if (slot == SERIALIZE_SLOT) { gen->serialize_tmp = state.data; gen->serialize_size = state.size; - context->sync_cycle = context->current_cycle; + context->sync_cycle = context->cycles; context->should_return = 1; } else if (slot == EVENTLOG_SLOT) { - event_state(context->current_cycle, &state); + event_state(context->cycles, &state); } else { save_to_file(&state, save_path); free(state.data); @@ -921,7 +921,7 @@ } free(save_path); } else if(gen->header.save_state) { - context->sync_cycle = context->current_cycle + 1; + context->sync_cycle = context->cycles + 1; } } return context; @@ -932,8 +932,8 @@ genesis_context * gen = context->system; if ((gen->header.type != SYSTEM_PICO && gen->header.type != SYSTEM_COPERA) || context->int_num > 3) { vdp_context * v_context = gen->vdp; - //printf("acknowledging %d @ %d:%d, vcounter: %d, hslot: %d\n", context->int_ack, context->current_cycle, v_context->cycles, v_context->vcounter, v_context->hslot); - vdp_run_context(v_context, context->current_cycle); + //printf("acknowledging %d @ %d:%d, vcounter: %d, hslot: %d\n", context->int_ack, context->cycles, v_context->cycles, v_context->vcounter, v_context->hslot); + vdp_run_context(v_context, context->cycles); vdp_int_ack(v_context); } @@ -943,8 +943,8 @@ //Base 68K core has added 4 cycles for a normal int ack cycle already //We add 5 + the current cycle count (in 68K cycles) mod 10 to simulate the //additional variable delay from the use of the 6800 cycle - uint32_t cycle_count = context->current_cycle / context->options->gen.clock_divider; - context->current_cycle += 5 + (cycle_count % 10); + uint32_t cycle_count = context->cycles / context->opts->gen.clock_divider; + context->cycles += 5 + (cycle_count % 10); return context; } @@ -959,7 +959,7 @@ fatal_error("machine freeze due to VDP write to %X without TMSS unlock\n", 0xC00000 | vdp_port); } vdp_port &= 0x1F; - //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle); + //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->cycles); //do refresh check here so we can avoid adding a penalty for a refresh that happens during a VDP access gen_update_refresh_free_access(context); @@ -980,12 +980,12 @@ did_dma = 1; vdp_run_dma_done(v_context, gen->frame_end); if (v_context->cycles >= gen->frame_end) { - uint32_t cycle_diff = v_context->cycles - context->current_cycle; + uint32_t cycle_diff = v_context->cycles - context->cycles; uint32_t m68k_cycle_diff = (cycle_diff / MCLKS_PER_68K) * MCLKS_PER_68K; if (m68k_cycle_diff < cycle_diff) { m68k_cycle_diff += MCLKS_PER_68K; } - context->current_cycle += m68k_cycle_diff; + context->cycles += m68k_cycle_diff; gen->bus_busy = 1; if (gen->header.type == SYSTEM_PICO || gen->header.type == SYSTEM_COPERA) { sync_components_pico(context, 0); @@ -995,24 +995,24 @@ gen->bus_busy = 0; } } - //context->current_cycle = v_context->cycles; + //context->cycles = v_context->cycles; } } else if(vdp_port < 8) { - vdp_run_context_full(v_context, context->current_cycle); + vdp_run_context_full(v_context, context->cycles); before_cycle = v_context->cycles; - blocked = vdp_control_port_write(v_context, value, context->current_cycle); + blocked = vdp_control_port_write(v_context, value, context->cycles); if (blocked) { while (blocked) { while(v_context->flags & FLAG_DMA_RUN) { did_dma = 1; vdp_run_dma_done(v_context, gen->frame_end); if (v_context->cycles >= gen->frame_end) { - uint32_t cycle_diff = v_context->cycles - context->current_cycle; + uint32_t cycle_diff = v_context->cycles - context->cycles; uint32_t m68k_cycle_diff = (cycle_diff / MCLKS_PER_68K) * MCLKS_PER_68K; if (m68k_cycle_diff < cycle_diff) { m68k_cycle_diff += MCLKS_PER_68K; } - context->current_cycle += m68k_cycle_diff; + context->cycles += m68k_cycle_diff; gen->bus_busy = 1; if (gen->header.type == SYSTEM_PICO || gen->header.type == SYSTEM_COPERA) { sync_components_pico(context, 0); @@ -1024,14 +1024,14 @@ } if (blocked < 0) { - blocked = vdp_control_port_write(v_context, value, context->current_cycle); + blocked = vdp_control_port_write(v_context, value, context->cycles); } else { blocked = 0; } } } else { context->sync_cycle = gen->frame_end = vdp_cycles_to_frame_end(v_context); - //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot); + //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->cycles, v_context->vcounter, v_context->hslot); if (gen->header.type == SYSTEM_PICO || gen->header.type == SYSTEM_COPERA) { adjust_int_cycle_pico(context, v_context); } else { @@ -1042,13 +1042,13 @@ fatal_error("Illegal write to HV Counter port %X\n", vdp_port); } if (v_context->cycles != before_cycle) { - //printf("68K paused for %d (%d) cycles at cycle %d (%d) for write\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle); - uint32_t cycle_diff = v_context->cycles - context->current_cycle; + //printf("68K paused for %d (%d) cycles at cycle %d (%d) for write\n", v_context->cycles - context->cycles, v_context->cycles - before_cycle, context->cycles, before_cycle); + uint32_t cycle_diff = v_context->cycles - context->cycles; uint32_t m68k_cycle_diff = (cycle_diff / MCLKS_PER_68K) * MCLKS_PER_68K; if (m68k_cycle_diff < cycle_diff) { m68k_cycle_diff += MCLKS_PER_68K; } - context->current_cycle += m68k_cycle_diff; + context->cycles += m68k_cycle_diff; if (gen->header.type == SYSTEM_GENESIS) { //Lock the Z80 out of the bus until the VDP access is complete gen->bus_busy = 1; @@ -1064,7 +1064,7 @@ if (did_dma) { gen->refresh_counter = 0; - gen->last_sync_cycle = context->current_cycle; + gen->last_sync_cycle = context->cycles; } else { //refresh may have happened while we were waiting on the VDP, //so advance refresh_counter but don't add any delays @@ -1127,10 +1127,10 @@ sync_components(context, 0); } vdp_context * v_context = gen->vdp; - uint32_t before_cycle = context->current_cycle; + uint32_t before_cycle = context->cycles; if (vdp_port < 0x10) { if (vdp_port < 4) { - value = vdp_data_port_read(v_context, &context->current_cycle, MCLKS_PER_68K); + value = vdp_data_port_read(v_context, &context->cycles, MCLKS_PER_68K); } else if(vdp_port < 8) { value = vdp_control_port_read(v_context); } else { @@ -1142,13 +1142,13 @@ } else { value = get_open_bus_value(&gen->header); } - if (context->current_cycle != before_cycle) { - //printf("68K paused for %d (%d) cycles at cycle %d (%d) for read\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle); + if (context->cycles != before_cycle) { + //printf("68K paused for %d (%d) cycles at cycle %d (%d) for read\n", v_context->cycles - context->cycles, v_context->cycles - before_cycle, context->cycles, before_cycle); //Lock the Z80 out of the bus until the VDP access is complete genesis_context *gen = context->system; if (gen->header.type == SYSTEM_GENESIS) { gen->bus_busy = 1; - sync_z80(gen, context->current_cycle); + sync_z80(gen, context->cycles); gen->bus_busy = 0; } } @@ -1182,7 +1182,7 @@ //TODO: add cycle for an access right after a previous one //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high // Needs a new logic analyzer capture to get the actual delay on the 68K side - gen->m68k->current_cycle += 8 * MCLKS_PER_68K; + gen->m68k->cycles += 8 * MCLKS_PER_68K; vdp_port &= 0x1F; @@ -1199,7 +1199,7 @@ ret = vdp_hv_counter_read(gen->vdp); } if (context->Z80_CYCLE != before) { - gen->m68k->current_cycle += context->Z80_CYCLE - before; + gen->m68k->cycles += context->Z80_CYCLE - before; } } else { //TODO: Figure out the correct value today @@ -1220,8 +1220,8 @@ if (location < 0x10000) { //Access to Z80 memory incurs a one 68K cycle wait state - context->current_cycle += MCLKS_PER_68K; - if (!z80_enabled || z80_get_busack(gen->z80, context->current_cycle)) { + context->cycles += MCLKS_PER_68K; + if (!z80_enabled || z80_get_busack(gen->z80, context->cycles)) { location &= 0x7FFF; if (location < 0x4000) { gen->zram[location & 0x1FFF] = value; @@ -1229,7 +1229,7 @@ z80_handle_code_write(location & 0x1FFF, gen->z80); #endif } else if (location < 0x6000) { - sync_sound(gen, context->current_cycle); + sync_sound(gen, context->cycles); if (location & 1) { ym_data_write(gen->ym, value); } else if(location & 2) { @@ -1253,25 +1253,25 @@ switch(location >> 1 & 0xFF) { case 0x1: - io_data_write(gen->io.ports, value, context->current_cycle); + io_data_write(gen->io.ports, value, context->cycles); break; case 0x2: - io_data_write(gen->io.ports+1, value, context->current_cycle); + io_data_write(gen->io.ports+1, value, context->cycles); break; case 0x3: - io_data_write(gen->io.ports+2, value, context->current_cycle); + io_data_write(gen->io.ports+2, value, context->cycles); break; case 0x4: - io_control_write(gen->io.ports, value, context->current_cycle); + io_control_write(gen->io.ports, value, context->cycles); break; case 0x5: - io_control_write(gen->io.ports+1, value, context->current_cycle); + io_control_write(gen->io.ports+1, value, context->cycles); break; case 0x6: - io_control_write(gen->io.ports+2, value, context->current_cycle); + io_control_write(gen->io.ports+2, value, context->cycles); break; case 0x7: - io_tx_write(gen->io.ports, value, context->current_cycle); + io_tx_write(gen->io.ports, value, context->cycles); break; case 0x8: case 0xB: @@ -1279,20 +1279,20 @@ //serial input port is not writeable break; case 0x9: - io_sctrl_write(gen->io.ports, value, context->current_cycle); + io_sctrl_write(gen->io.ports, value, context->cycles); gen->io.ports[0].serial_ctrl = value; break; case 0xA: - io_tx_write(gen->io.ports + 1, value, context->current_cycle); + io_tx_write(gen->io.ports + 1, value, context->cycles); break; case 0xC: - io_sctrl_write(gen->io.ports + 1, value, context->current_cycle); + io_sctrl_write(gen->io.ports + 1, value, context->cycles); break; case 0xD: - io_tx_write(gen->io.ports + 2, value, context->current_cycle); + io_tx_write(gen->io.ports + 2, value, context->cycles); break; case 0xF: - io_sctrl_write(gen->io.ports + 2, value, context->current_cycle); + io_sctrl_write(gen->io.ports + 2, value, context->cycles); break; } } else { @@ -1301,7 +1301,7 @@ if (value & 1) { dputs("bus requesting Z80"); if (z80_enabled) { - z80_assert_busreq(gen->z80, context->current_cycle); + z80_assert_busreq(gen->z80, context->cycles); } else { gen->z80->busack = 1; } @@ -1317,22 +1317,22 @@ #endif } if (z80_enabled) { - z80_clear_busreq(gen->z80, context->current_cycle); + z80_clear_busreq(gen->z80, context->cycles); } else { gen->z80->busack = 0; } } } else if (masked == 0x11200) { - sync_z80(gen, context->current_cycle); + sync_z80(gen, context->cycles); if (value & 1) { if (z80_enabled) { - z80_clear_reset(gen->z80, context->current_cycle); + z80_clear_reset(gen->z80, context->cycles); } else { gen->z80->reset = 0; } } else { if (z80_enabled) { - z80_assert_reset(gen->z80, context->current_cycle); + z80_assert_reset(gen->z80, context->cycles); } else { gen->z80->reset = 1; } @@ -1370,14 +1370,14 @@ m68k_context *context = vcontext; genesis_context *gen = context->system; if (port == 0x10) { - sync_sound_pico(gen, context->current_cycle); + sync_sound_pico(gen, context->cycles); pico_pcm_data_write(gen->adpcm, value); printf("PICO ADPCM Data: %04X\n", value); if (context->int_num == 3) { adjust_int_cycle_pico(context, gen->vdp); } } else if (port == 0x12) { - sync_sound_pico(gen, context->current_cycle); + sync_sound_pico(gen, context->cycles); printf("PICO ADPCM Control: %04X\n", value); pico_pcm_ctrl_write(gen->adpcm, value); adjust_int_cycle_pico(context, gen->vdp); @@ -1404,14 +1404,14 @@ if (location < 0x10000) { //Access to Z80 memory incurs a one 68K cycle wait state - context->current_cycle += MCLKS_PER_68K; - if (!z80_enabled || z80_get_busack(gen->z80, context->current_cycle)) { + context->cycles += MCLKS_PER_68K; + if (!z80_enabled || z80_get_busack(gen->z80, context->cycles)) { location &= 0x7FFF; if (location < 0x4000) { value = gen->zram[location & 0x1FFF]; } else if (location < 0x6000) { - sync_sound(gen, context->current_cycle); - value = ym_read_status(gen->ym, context->current_cycle, location); + sync_sound(gen, context->cycles); + value = ym_read_status(gen->ym, context->cycles, location); } else if (location < 0x7F00) { value = 0xFF; } else { @@ -1431,13 +1431,13 @@ value = gen->version_reg; break; case 0x1: - value = io_data_read(gen->io.ports, context->current_cycle); + value = io_data_read(gen->io.ports, context->cycles); break; case 0x2: - value = io_data_read(gen->io.ports+1, context->current_cycle); + value = io_data_read(gen->io.ports+1, context->cycles); break; case 0x3: - value = io_data_read(gen->io.ports+2, context->current_cycle); + value = io_data_read(gen->io.ports+2, context->cycles); break; case 0x4: value = gen->io.ports[0].control; @@ -1452,28 +1452,28 @@ value = gen->io.ports[0].serial_out; break; case 0x8: - value = io_rx_read(gen->io.ports, context->current_cycle); + value = io_rx_read(gen->io.ports, context->cycles); break; case 0x9: - value = io_sctrl_read(gen->io.ports, context->current_cycle); + value = io_sctrl_read(gen->io.ports, context->cycles); break; case 0xA: value = gen->io.ports[1].serial_out; break; case 0xB: - value = io_rx_read(gen->io.ports + 1, context->current_cycle); + value = io_rx_read(gen->io.ports + 1, context->cycles); break; case 0xC: - value = io_sctrl_read(gen->io.ports, context->current_cycle); + value = io_sctrl_read(gen->io.ports, context->cycles); break; case 0xD: value = gen->io.ports[2].serial_out; break; case 0xE: - value = io_rx_read(gen->io.ports + 1, context->current_cycle); + value = io_rx_read(gen->io.ports + 1, context->cycles); break; case 0xF: - value = io_sctrl_read(gen->io.ports, context->current_cycle); + value = io_sctrl_read(gen->io.ports, context->cycles); break; default: value = get_open_bus_value(&gen->header) >> 8; @@ -1481,9 +1481,9 @@ } else { uint32_t masked = location & 0xFFF00; if (masked == 0x11100) { - value = z80_enabled ? !z80_get_busack(gen->z80, context->current_cycle) : !gen->z80->busack; + value = z80_enabled ? !z80_get_busack(gen->z80, context->cycles) : !gen->z80->busack; value |= (get_open_bus_value(&gen->header) >> 8) & 0xFE; - dprintf("Byte read of BUSREQ returned %d @ %d (reset: %d)\n", value, context->current_cycle, gen->z80->reset); + dprintf("Byte read of BUSREQ returned %d @ %d (reset: %d)\n", value, context->cycles, gen->z80->reset); } else if (masked == 0x11200) { value = !gen->z80->reset; } else if (masked == 0x11300 || masked == 0x11000) { @@ -1545,18 +1545,18 @@ return 0; } case 8: - //printf("uPD7759 data read @ %u\n", m68k->current_cycle); - sync_sound_pico(gen, m68k->current_cycle); + //printf("uPD7759 data read @ %u\n", m68k->cycles); + sync_sound_pico(gen, m68k->cycles); tmp = pico_pcm_data_read(gen->adpcm); return (location & 1) ? tmp : tmp >> 8; case 9: - //printf("uPD7759 contro/status read @ %u\n", m68k->current_cycle); - sync_sound_pico(gen, m68k->current_cycle); + //printf("uPD7759 contro/status read @ %u\n", m68k->cycles); + sync_sound_pico(gen, m68k->cycles); tmp = pico_pcm_ctrl_read(gen->adpcm); return (location & 1) ? tmp : tmp >> 8; return 0; default: - printf("Unknown Pico IO read %X @ %u\n", location, m68k->current_cycle); + printf("Unknown Pico IO read %X @ %u\n", location, m68k->cycles); return 0xFF; } } @@ -1567,10 +1567,10 @@ genesis_context *gen = m68k->system; uint32_t port = location & 0xFE; if (port == 0x10) { - sync_sound_pico(gen, m68k->current_cycle); + sync_sound_pico(gen, m68k->cycles); return pico_pcm_data_read(gen->adpcm); } else if (port == 0x12) { - sync_sound_pico(gen, m68k->current_cycle); + sync_sound_pico(gen, m68k->cycles); return pico_pcm_ctrl_read(gen->adpcm); } uint16_t value = pico_io_read(location, vcontext); @@ -1592,14 +1592,14 @@ { case 1: case 5: - ymz263b_run(gen->ymz, m68k->current_cycle); + ymz263b_run(gen->ymz, m68k->cycles); ret = ymz263b_status_read(gen->ymz); printf("Copera YMZ263 Status read - %X: %X\n", location, ret); adjust_int_cycle_pico(gen->m68k, gen->vdp); return ret; case 3: case 7: - ymz263b_run(gen->ymz, m68k->current_cycle); + ymz263b_run(gen->ymz, m68k->cycles); ret = ymz263b_data_read(gen->ymz, location & 4); printf("Copera YMZ263 Data read - %X: %X\n", location, ret); return ret; @@ -1623,13 +1623,13 @@ { case 1: case 5: - ymz263b_run(gen->ymz, m68k->current_cycle); + ymz263b_run(gen->ymz, m68k->cycles); printf("Copera YMZ263 Address write - %X: %X\n", location, value); ymz263b_address_write(gen->ymz, value); break; case 3: case 7: - ymz263b_run(gen->ymz, m68k->current_cycle); + ymz263b_run(gen->ymz, m68k->cycles); printf("Copera YMZ263 Channel #%d Data write - %X: %X\n", ((location & 4) >> 2) + 1, location, value); ymz263b_data_write(gen->ymz, location & 4, value); adjust_int_cycle_pico(gen->m68k, gen->vdp); @@ -1682,14 +1682,14 @@ z80_context * context = vcontext; genesis_context *gen = context->system; if (gen->bus_busy) { - context->Z80_CYCLE = gen->m68k->current_cycle; + context->Z80_CYCLE = gen->m68k->cycles; } //typical delay from bus arbitration context->Z80_CYCLE += 3 * MCLKS_PER_Z80; //TODO: add cycle for an access right after a previous one //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high // Needs a new logic analyzer capture to get the actual delay on the 68K side - gen->m68k->current_cycle += 8 * MCLKS_PER_68K; + gen->m68k->cycles += 8 * MCLKS_PER_68K; location &= 0x7FFF; if (context->mem_pointers[1]) { @@ -1713,14 +1713,14 @@ z80_context * context = vcontext; genesis_context *gen = context->system; if (gen->bus_busy) { - context->Z80_CYCLE = gen->m68k->current_cycle; + context->Z80_CYCLE = gen->m68k->cycles; } //typical delay from bus arbitration context->Z80_CYCLE += 3 * MCLKS_PER_Z80; //TODO: add cycle for an access right after a previous one //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high // Needs a new logic analyzer capture to get the actual delay on the 68K side - gen->m68k->current_cycle += 8 * MCLKS_PER_68K; + gen->m68k->cycles += 8 * MCLKS_PER_68K; location &= 0x7FFF; uint32_t address = gen->z80_bank_reg << 15 | location; @@ -1752,11 +1752,11 @@ genesis_context *gen = context->system; if (location >= 0x800000) { //do refresh check here so we can avoid adding a penalty for a refresh that happens during an IO area access - gen->refresh_counter += context->current_cycle - 4*MCLKS_PER_68K - gen->last_sync_cycle; - context->current_cycle += REFRESH_DELAY * MCLKS_PER_68K * (gen->refresh_counter / (MCLKS_PER_68K * REFRESH_INTERVAL)); + gen->refresh_counter += context->cycles - 4*MCLKS_PER_68K - gen->last_sync_cycle; + context->cycles += REFRESH_DELAY * MCLKS_PER_68K * (gen->refresh_counter / (MCLKS_PER_68K * REFRESH_INTERVAL)); gen->refresh_counter += 4*MCLKS_PER_68K; gen->refresh_counter = gen->refresh_counter % (MCLKS_PER_68K * REFRESH_INTERVAL); - gen->last_sync_cycle = context->current_cycle; + gen->last_sync_cycle = context->cycles; } if (location < 0x800000 || (location >= 0xA13000 && location < 0xA13100) || (location >= 0xA12000 && location < 0xA12100)) { @@ -1815,11 +1815,11 @@ genesis_context *gen = context->system; if (location >= 0x800000) { //do refresh check here so we can avoid adding a penalty for a refresh that happens during an IO area access - gen->refresh_counter += context->current_cycle - 4*MCLKS_PER_68K - gen->last_sync_cycle; - context->current_cycle += REFRESH_DELAY * MCLKS_PER_68K * (gen->refresh_counter / (MCLKS_PER_68K * REFRESH_INTERVAL)); + gen->refresh_counter += context->cycles - 4*MCLKS_PER_68K - gen->last_sync_cycle; + context->cycles += REFRESH_DELAY * MCLKS_PER_68K * (gen->refresh_counter / (MCLKS_PER_68K * REFRESH_INTERVAL)); gen->refresh_counter += 4*MCLKS_PER_68K; gen->refresh_counter = gen->refresh_counter % (MCLKS_PER_68K * REFRESH_INTERVAL); - gen->last_sync_cycle = context->current_cycle; + gen->last_sync_cycle = context->cycles; } uint8_t has_tmss = gen->version_reg & 0xF; @@ -1980,8 +1980,8 @@ gen->reset_requested = 0; gen->m68k->should_return = 0; if (gen->header.type == SYSTEM_GENESIS) { - z80_assert_reset(gen->z80, gen->m68k->current_cycle); - z80_clear_busreq(gen->z80, gen->m68k->current_cycle); + z80_assert_reset(gen->z80, gen->m68k->cycles); + z80_clear_busreq(gen->z80, gen->m68k->cycles); } if (gen->header.type != SYSTEM_PICO && gen->header.type != SYSTEM_COPERA) { ym_reset(gen->ym); @@ -2040,8 +2040,8 @@ if (gen->header.enter_debugger) { gen->header.enter_debugger = 0; #ifndef IS_LIB - uint32_t address = read_word(4, (void **)gen->m68k->mem_pointers, &gen->m68k->options->gen, gen->m68k) << 16 - | read_word(6, (void **)gen->m68k->mem_pointers, &gen->m68k->options->gen, gen->m68k); + uint32_t address = read_word(4, (void **)gen->m68k->mem_pointers, &gen->m68k->opts->gen, gen->m68k) << 16 + | read_word(6, (void **)gen->m68k->mem_pointers, &gen->m68k->opts->gen, gen->m68k); insert_breakpoint(gen->m68k, address, gen->header.debugger_type == DEBUGGER_NATIVE ? debugger : gdb_debug_enter); #endif } @@ -2081,7 +2081,7 @@ static void request_exit(system_header *system) { genesis_context *gen = (genesis_context *)system; - gen->m68k->target_cycle = gen->m68k->current_cycle; + gen->m68k->target_cycle = gen->m68k->cycles; gen->m68k->should_return = 1; } @@ -2193,7 +2193,7 @@ genesis_context *gen = (genesis_context *)system; if (gen->reset_cycle == CYCLE_NEVER) { double random = (double)rand()/(double)RAND_MAX; - gen->reset_cycle = gen->m68k->current_cycle + random * MCLKS_LINE * (gen->version_reg & HZ50 ? LINES_PAL : LINES_NTSC); + gen->reset_cycle = gen->m68k->cycles + random * MCLKS_LINE * (gen->version_reg & HZ50 ? LINES_PAL : LINES_NTSC); if (gen->reset_cycle < gen->m68k->target_cycle) { gen->m68k->target_cycle = gen->reset_cycle; } @@ -2207,8 +2207,8 @@ free_segacd(gen->expansion); } vdp_free(gen->vdp); - memmap_chunk *map = (memmap_chunk *)gen->m68k->options->gen.memmap; - m68k_options_free(gen->m68k->options); + memmap_chunk *map = (memmap_chunk *)gen->m68k->opts->gen.memmap; + m68k_options_free(gen->m68k->opts); free(gen->cart); free(gen->m68k); free(gen->work_ram); @@ -2454,7 +2454,7 @@ static void start_vgm_log(system_header *system, char *filename) { genesis_context *gen = (genesis_context *)system; - vgm_writer *vgm = vgm_write_open(filename, gen->version_reg & HZ50 ? 50 : 60, gen->normal_clock, gen->m68k->current_cycle); + vgm_writer *vgm = vgm_write_open(filename, gen->version_reg & HZ50 ? 50 : 60, gen->normal_clock, gen->m68k->cycles); if (vgm) { printf("Started logging VGM to %s\n", filename); if (gen->header.type != SYSTEM_PICO && gen->header.type != SYSTEM_COPERA) { @@ -2573,7 +2573,7 @@ genesis_context *gen = m68k->system; if (gen->tmss) { address += gen->tmss_write_offset; - uint16_t *dest = get_native_pointer(address, (void **)m68k->mem_pointers, &m68k->options->gen); + uint16_t *dest = get_native_pointer(address, (void **)m68k->mem_pointers, &m68k->opts->gen); *dest = value; m68k_handle_code_write(address, m68k); } @@ -2587,7 +2587,7 @@ genesis_context *gen = m68k->system; if (gen->tmss) { address += gen->tmss_write_offset; - uint8_t *dest = get_native_pointer(address & ~1, (void **)m68k->mem_pointers, &m68k->options->gen); + uint8_t *dest = get_native_pointer(address & ~1, (void **)m68k->mem_pointers, &m68k->opts->gen); #ifdef BLASTEM_BIG_ENDIAN dest[address & 1] = value; #else @@ -2604,7 +2604,7 @@ m68k_context *m68k = context; genesis_context *gen = m68k->system; if (gen->tmss) { - memmap_chunk const *chunk = find_map_chunk(address + gen->tmss_write_offset, &m68k->options->gen, 0, NULL); + memmap_chunk const *chunk = find_map_chunk(address + gen->tmss_write_offset, &m68k->opts->gen, 0, NULL); address >>= 1; uint8_t *base = (uint8_t *)m68k->mem_pointers[chunk->ptr_index]; base[address] = value; @@ -2617,7 +2617,7 @@ m68k_context *m68k = context; genesis_context *gen = m68k->system; if (gen->tmss && (address & 1)) { - memmap_chunk const *chunk = find_map_chunk(address + gen->tmss_write_offset, &m68k->options->gen, 0, NULL); + memmap_chunk const *chunk = find_map_chunk(address + gen->tmss_write_offset, &m68k->opts->gen, 0, NULL); address >>= 1; uint8_t *base = (uint8_t *)m68k->mem_pointers[chunk->ptr_index]; base[address] = value; @@ -2630,7 +2630,7 @@ m68k_context *m68k = context; genesis_context *gen = m68k->system; if (gen->tmss) { - memmap_chunk const *chunk = find_map_chunk(address + gen->tmss_write_offset, &m68k->options->gen, 0, NULL); + memmap_chunk const *chunk = find_map_chunk(address + gen->tmss_write_offset, &m68k->opts->gen, 0, NULL); address >>= 1; uint8_t *base = (uint8_t *)m68k->mem_pointers[chunk->ptr_index]; base[address] = value >> 8; @@ -2643,7 +2643,7 @@ m68k_context *m68k = context; genesis_context *gen = m68k->system; if (gen->tmss && !(address & 1)) { - memmap_chunk const *chunk = find_map_chunk(address + gen->tmss_write_offset, &m68k->options->gen, 0, NULL); + memmap_chunk const *chunk = find_map_chunk(address + gen->tmss_write_offset, &m68k->opts->gen, 0, NULL); address >>= 1; uint8_t *base = (uint8_t *)m68k->mem_pointers[chunk->ptr_index]; base[address] = value; @@ -3011,7 +3011,7 @@ } } cd->base = 0x400000; - cd->m68k->options->address_log = (ym_opts & OPT_ADDRESS_LOG) ? fopen("address_sub.log", "w") : NULL; + cd->m68k->opts->address_log = (ym_opts & OPT_ADDRESS_LOG) ? fopen("address_sub.log", "w") : NULL; } info.map = gen->header.info.map = NULL; @@ -3075,7 +3075,7 @@ gen->version_reg &= ~NO_DISK; gen->expansion = cd; - cd->m68k->options->address_log = (system_opts & OPT_ADDRESS_LOG) ? fopen("address_sub.log", "w") : NULL; + cd->m68k->opts->address_log = (system_opts & OPT_ADDRESS_LOG) ? fopen("address_sub.log", "w") : NULL; gen->version_reg &= ~NO_DISK; cd->genesis = gen; setup_io_devices(config, &info, &gen->io);
--- a/genesis.h Mon Apr 29 22:57:49 2024 -0700 +++ b/genesis.h Tue Apr 30 00:02:14 2024 -0700 @@ -8,10 +8,11 @@ #include <stdint.h> #include "system.h" -#include "m68k_core.h" #ifdef NEW_CORE +#include "m68k.h" #include "z80.h" #else +#include "m68k_core.h" #include "z80_to_x86.h" #endif #include "ym2612.h"
--- a/jcart.c Mon Apr 29 22:57:49 2024 -0700 +++ b/jcart.c Tue Apr 30 00:02:14 2024 -0700 @@ -23,8 +23,8 @@ m68k_context *m68k= context; io_port *ports = get_ports(m68k); value = value << 6 & 0x40; - io_data_write(ports, value, m68k->current_cycle); - io_data_write(ports + 1, value, m68k->current_cycle); + io_data_write(ports, value, m68k->cycles); + io_data_write(ports + 1, value, m68k->cycles); return context; } @@ -42,8 +42,8 @@ io_port *ports = get_ports(m68k); //according to Eke, bit 14 is forced low, at least on the Micro Machines 2 cart //TODO: Test behavior of actual cart - uint16_t value = io_data_read(ports, m68k->current_cycle) << 8; - value |= io_data_read(ports + 1, m68k->current_cycle); + uint16_t value = io_data_read(ports, m68k->cycles) << 8; + value |= io_data_read(ports + 1, m68k->cycles); return value; } @@ -51,14 +51,14 @@ { m68k_context *m68k= context; io_port *ports = get_ports(m68k); - return io_data_read(ports + (address & 1), m68k->current_cycle); + return io_data_read(ports + (address & 1), m68k->cycles); } void jcart_adjust_cycles(genesis_context *context, uint32_t deduction) { io_port *ports = get_ports(context->m68k); - io_adjust_cycles(ports, context->m68k->current_cycle, deduction); - io_adjust_cycles(ports + 1, context->m68k->current_cycle, deduction); + io_adjust_cycles(ports, context->m68k->cycles, deduction); + io_adjust_cycles(ports + 1, context->m68k->cycles, deduction); } void jcart_gamepad_down(genesis_context *context, uint8_t gamepad_num, uint8_t button)
--- a/m68k.cpu Mon Apr 29 22:57:49 2024 -0700 +++ b/m68k.cpu Tue Apr 30 00:02:14 2024 -0700 @@ -15,6 +15,17 @@ m68k_context *init_68k_context(m68k_options * opts, m68k_reset_handler reset_handler); void m68k_reset(m68k_context *context); void m68k_print_regs(m68k_context *context); + void m68k_serialize(m68k_context *context, uint32_t pc, serialize_buffer *buf); + void m68k_deserialize(deserialize_buffer *buf, void *vcontext); + define NUM_MEM_AREAS 10 + define M68K_OPT_BROKEN_READ_MODIFY 1 + define INT_PENDING_SR_CHANGE 254 + define INT_PENDING_NONE 255 + define M68K_STATUS_TRACE 0x80 + define m68k_invalidate_code_range(context, start, end) + define m68k_options_free free + define m68k_handle_code_write(address, context) + define resume_68k(context) m68k_execute(context, context->cycles) regs dregs 32 d0 d1 d2 d3 d4 d5 d6 d7 @@ -24,7 +35,11 @@ scratch1 32 scratch2 32 int_cycle 32 + target_cycle 32 + wp_hit_address 32 prefetch 16 + wp_hit_value 16 + wp_old_value 16 int_priority 8 int_num 8 int_pending 8 @@ -37,8 +52,11 @@ zflag 8 vflag 8 cflag 8 + wp_hit 8 + trace_pending 8 + system ptrvoid reset_handler ptrvoid - mem_pointers ptrvoid 8 + mem_pointers ptrvoid 10 flags register ccr
--- a/m68k_core.c Mon Apr 29 22:57:49 2024 -0700 +++ b/m68k_core.c Tue Apr 30 00:02:14 2024 -0700 @@ -667,7 +667,7 @@ code_ptr get_native_from_context(m68k_context * context, uint32_t address) { - return get_native_address(context->options, address); + return get_native_address(context->opts, address); } uint32_t get_instruction_start(m68k_options *opts, uint32_t address) @@ -700,7 +700,7 @@ static void map_native_address(m68k_context * context, uint32_t address, code_ptr native_addr, uint8_t size, uint8_t native_size) { - m68k_options * opts = context->options; + m68k_options * opts = context->opts; native_map_slot * native_code_map = opts->gen.native_code_map; uint32_t meta_off; memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, MMAP_CODE, &meta_off); @@ -774,7 +774,7 @@ static void m68k_handle_deferred(m68k_context * context) { - m68k_options * opts = context->options; + m68k_options * opts = context->opts; process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context); if (opts->gen.deferred) { translate_m68k_stream(opts->gen.deferred->address, context); @@ -783,8 +783,8 @@ uint16_t m68k_get_ir(m68k_context *context) { - uint32_t inst_addr = get_instruction_start(context->options, context->last_prefetch_address-2); - uint16_t *native_addr = get_native_pointer(inst_addr, (void **)context->mem_pointers, &context->options->gen); + uint32_t inst_addr = get_instruction_start(context->opts, context->last_prefetch_address-2); + uint16_t *native_addr = get_native_pointer(inst_addr, (void **)context->mem_pointers, &context->opts->gen); if (native_addr) { return *native_addr; } @@ -854,7 +854,7 @@ return vcontext; } if (watch->check_change) { - uint16_t old = read_word(address, (void **)context->mem_pointers, &context->options->gen, context); + uint16_t old = read_word(address, (void **)context->mem_pointers, &context->opts->gen, context); if (old == value) { return vcontext; } @@ -865,7 +865,7 @@ context->wp_hit_address = address; context->wp_hit_value = value; context->wp_hit = 1; - context->target_cycle = context->sync_cycle = context->current_cycle; + context->target_cycle = context->sync_cycle = context->cycles; system_header *system = context->system; return vcontext; } @@ -878,7 +878,7 @@ return vcontext; } if (watch->check_change) { - uint8_t old = read_byte(address, (void **)context->mem_pointers, &context->options->gen, context); + uint8_t old = read_byte(address, (void **)context->mem_pointers, &context->opts->gen, context); if (old == value) { return vcontext; } @@ -889,34 +889,34 @@ context->wp_hit_address = address; context->wp_hit_value = value; context->wp_hit = 1; - context->target_cycle = context->sync_cycle = context->current_cycle; + context->target_cycle = context->sync_cycle = context->cycles; system_header *system = context->system; return vcontext; } static void m68k_enable_watchpoints(m68k_context *context) { - if (context->options->gen.check_watchpoints_16) { + if (context->opts->gen.check_watchpoints_16) { //already enabled return; } - context->options->gen.check_watchpoints_16 = m68k_watchpoint_check16; - context->options->gen.check_watchpoints_8 = m68k_watchpoint_check8; + context->opts->gen.check_watchpoints_16 = m68k_watchpoint_check16; + context->opts->gen.check_watchpoints_8 = m68k_watchpoint_check8; //re-generate write handlers with watchpoints enabled - code_ptr new_write16 = gen_mem_fun(&context->options->gen, context->options->gen.memmap, context->options->gen.memmap_chunks, WRITE_16, NULL); - code_ptr new_write8 = gen_mem_fun(&context->options->gen, context->options->gen.memmap, context->options->gen.memmap_chunks, WRITE_8, NULL); + code_ptr new_write16 = gen_mem_fun(&context->opts->gen, context->opts->gen.memmap, context->opts->gen.memmap_chunks, WRITE_16, NULL); + code_ptr new_write8 = gen_mem_fun(&context->opts->gen, context->opts->gen.memmap, context->opts->gen.memmap_chunks, WRITE_8, NULL); //patch old write handlers to point to the new ones code_info code = { - .cur = context->options->write_16, - .last = context->options->write_16 + 256 + .cur = context->opts->write_16, + .last = context->opts->write_16 + 256 }; jmp(&code, new_write16); - code.cur = context->options->write_8; + code.cur = context->opts->write_8; code.last = code.cur + 256; jmp(&code, new_write8); - context->options->write_16 = new_write16; - context->options->write_8 = new_write8; + context->opts->write_16 = new_write16; + context->opts->write_8 = new_write8; } void m68k_add_watchpoint(m68k_context *context, uint32_t address, uint32_t size) @@ -933,7 +933,7 @@ context->wp_storage = context->wp_storage ? context->wp_storage * 2 : 4; context->watchpoints = realloc(context->watchpoints, context->wp_storage * sizeof(m68k_watchpoint)); } - const memmap_chunk *chunk = find_map_chunk(address, &context->options->gen, 0, NULL); + const memmap_chunk *chunk = find_map_chunk(address, &context->opts->gen, 0, NULL); context->watchpoints[context->num_watchpoints++] = (m68k_watchpoint){ .start = address, .end = end, @@ -1077,7 +1077,7 @@ static void translate_m68k(m68k_context *context, m68kinst * inst) { - m68k_options * opts = context->options; + m68k_options * opts = context->opts; if (inst->address & 1) { translate_m68k_odd(opts, inst); return; @@ -1135,13 +1135,13 @@ uint16_t m68k_instruction_fetch(uint32_t address, void *vcontext) { m68k_context *context = vcontext; - return read_word(address, (void **)context->mem_pointers, &context->options->gen, context); + return read_word(address, (void **)context->mem_pointers, &context->opts->gen, context); } void translate_m68k_stream(uint32_t address, m68k_context * context) { m68kinst instbuf; - m68k_options * opts = context->options; + m68k_options * opts = context->opts; code_info *code = &opts->gen.code; if(get_native_address(opts, address)) { return; @@ -1214,10 +1214,10 @@ void * m68k_retranslate_inst(uint32_t address, m68k_context * context) { - m68k_options * opts = context->options; + m68k_options * opts = context->opts; code_info *code = &opts->gen.code; uint8_t orig_size = get_native_inst_size(opts, address); - code_ptr orig_start = get_native_address(context->options, address); + code_ptr orig_start = get_native_address(context->opts, address); uint32_t orig = address; code_info orig_code = {orig_start, orig_start + orig_size + 5, 0}; m68kinst instbuf; @@ -1290,10 +1290,10 @@ code_ptr get_native_address_trans(m68k_context * context, uint32_t address) { - code_ptr ret = get_native_address(context->options, address); + code_ptr ret = get_native_address(context->opts, address); if (!ret) { translate_m68k_stream(address, context); - ret = get_native_address(context->options, address); + ret = get_native_address(context->opts, address); } return ret; } @@ -1310,21 +1310,21 @@ break; } } - code_ptr native = get_native_address(context->options, address); + code_ptr native = get_native_address(context->opts, address); if (!native) { return; } - code_info tmp = context->options->gen.code; - context->options->gen.code.cur = native; - context->options->gen.code.last = native + MAX_NATIVE_SIZE; - check_cycles_int(&context->options->gen, address); - context->options->gen.code = tmp; + code_info tmp = context->opts->gen.code; + context->opts->gen.code.cur = native; + context->opts->gen.code.last = native + MAX_NATIVE_SIZE; + check_cycles_int(&context->opts->gen, address); + context->opts->gen.code = tmp; } void start_68k_context(m68k_context * context, uint32_t address) { code_ptr addr = get_native_address_trans(context, address); - m68k_options * options = context->options; + m68k_options * options = context->opts; options->start_context(addr, context); } @@ -1334,7 +1334,7 @@ if (!context->stack_storage_count) { context->resume_pc = NULL; } - m68k_options * options = context->options; + m68k_options * options = context->opts; context->should_return = 0; options->start_context(addr, context); } @@ -1342,7 +1342,7 @@ void m68k_reset(m68k_context * context) { //TODO: Actually execute the M68K reset vector rather than simulating some of its behavior - uint16_t *reset_vec = get_native_pointer(0, (void **)context->mem_pointers, &context->options->gen); + uint16_t *reset_vec = get_native_pointer(0, (void **)context->mem_pointers, &context->opts->gen); if (!(context->status & 0x20)) { //switching from user to system mode so swap stack pointers context->aregs[8] = context->aregs[7]; @@ -1353,7 +1353,7 @@ context->aregs[7] = ((uint32_t)reset_vec[0]) << 16 | reset_vec[1]; uint32_t address = ((uint32_t)reset_vec[2]) << 16 | reset_vec[3]; //interrupt mask may have changed so force a sync - context->options->sync_components(context, address); + context->opts->sync_components(context, address); start_68k_context(context, address); } @@ -1381,7 +1381,7 @@ m68k_context * init_68k_context(m68k_options * opts, m68k_reset_handler reset_handler) { m68k_context * context = calloc(1, sizeof(m68k_context) + ram_size(&opts->gen) / (1 << opts->gen.ram_flags_shift) / 8); - context->options = opts; + context->opts = opts; context->int_cycle = CYCLE_NEVER; context->status = 0x27; context->reset_handler = (code_ptr)reset_handler; @@ -1405,7 +1405,7 @@ sr |= context->flags[flag] != 0; } save_int16(buf, sr); - save_int32(buf, context->current_cycle); + save_int32(buf, context->cycles); save_int32(buf, context->int_cycle); save_int8(buf, context->int_num); save_int8(buf, context->int_pending); @@ -1432,7 +1432,7 @@ context->flags[flag] = sr & 1; sr >>= 1; } - context->current_cycle = load_int32(buf); + context->cycles = load_int32(buf); context->int_cycle = load_int32(buf); context->int_num = load_int8(buf); context->int_pending = load_int8(buf);
--- a/m68k_core.h Mon Apr 29 22:57:49 2024 -0700 +++ b/m68k_core.h Tue Apr 30 00:02:14 2024 -0700 @@ -98,7 +98,7 @@ uint32_t dregs[8]; uint32_t aregs[9]; uint32_t target_cycle; //cycle at which the next synchronization or interrupt occurs - uint32_t current_cycle; + uint32_t cycles; uint32_t sync_cycle; uint32_t int_cycle; uint32_t int_num; @@ -108,7 +108,7 @@ uint16_t *mem_pointers[NUM_MEM_AREAS]; code_ptr resume_pc; code_ptr reset_handler; - m68k_options *options; + m68k_options *opts; void *system; void *host_sp_entry; void *stack_storage[M68K_STACK_STORAGE];
--- a/m68k_core_x86.c Mon Apr 29 22:57:49 2024 -0700 +++ b/m68k_core_x86.c Tue Apr 30 00:02:14 2024 -0700 @@ -1785,7 +1785,7 @@ } } cycles += force ? 6 : bit ? 4 : 2; - context->current_cycle += cycles * context->options->gen.clock_divider; + context->cycles += cycles * context->opts->gen.clock_divider; quotient = quotient << 1 | bit; return dividend | quotient; } @@ -1808,7 +1808,7 @@ context->flags[FLAG_N] = 1; context->flags[FLAG_Z] = 0; cycles += 4; - context->current_cycle += cycles * context->options->gen.clock_divider; + context->cycles += cycles * context->opts->gen.clock_divider; return orig_dividend; } uint16_t quotient = 0; @@ -1845,7 +1845,7 @@ context->flags[FLAG_V] = 1; context->flags[FLAG_N] = 1; context->flags[FLAG_Z] = 0; - context->current_cycle += cycles * context->options->gen.clock_divider; + context->cycles += cycles * context->opts->gen.clock_divider; return orig_dividend; } else { dividend = -dividend; @@ -1873,13 +1873,13 @@ if (context->flags[FLAG_V]) { context->flags[FLAG_N] = 1; context->flags[FLAG_Z] = 0; - context->current_cycle += cycles * context->options->gen.clock_divider; + context->cycles += cycles * context->opts->gen.clock_divider; return orig_dividend; } context->flags[FLAG_N] = (quotient & 0x8000) ? 1 : 0; context->flags[FLAG_Z] = quotient == 0; //V was cleared above, C is cleared by the generated machine code - context->current_cycle += cycles * context->options->gen.clock_divider; + context->cycles += cycles * context->opts->gen.clock_divider; return dividend | quotient; } @@ -2055,7 +2055,7 @@ pop_r(code, opts->gen.context_reg); //turn 68K cycles into master clock cycles and add to the current cycle count imul_irr(code, opts->gen.clock_divider, RAX, RAX, SZ_D); - add_rrdisp(code, RAX, opts->gen.context_reg, offsetof(m68k_context, current_cycle), SZ_D); + add_rrdisp(code, RAX, opts->gen.context_reg, offsetof(m68k_context, cycles), SZ_D); //restore context and scratch1 call(code, opts->gen.load_context); pop_r(code, opts->gen.scratch1); @@ -2511,10 +2511,10 @@ m68k_context * m68k_handle_code_write(uint32_t address, m68k_context * context) { - m68k_options * options = context->options; + m68k_options * options = context->opts; uint32_t inst_start = get_instruction_start(options, address); while (inst_start && (address - inst_start) < M68K_MAX_INST_SIZE) { - code_ptr dst = get_native_address(context->options, inst_start); + code_ptr dst = get_native_address(context->opts, inst_start); patch_for_retranslate(&options->gen, dst, options->retrans_stub); inst_start = get_instruction_start(options, inst_start - 2); } @@ -2523,7 +2523,7 @@ void m68k_invalidate_code_range(m68k_context *context, uint32_t start, uint32_t end) { - m68k_options *opts = context->options; + m68k_options *opts = context->opts; native_map_slot *native_code_map = opts->gen.native_code_map; if (start > M68K_MAX_INST_SIZE - 2) { start -= M68K_MAX_INST_SIZE - 2; @@ -2564,9 +2564,9 @@ void m68k_breakpoint_patch(m68k_context *context, uint32_t address, m68k_debug_handler bp_handler, code_ptr native_addr) { - m68k_options * opts = context->options; + m68k_options * opts = context->opts; code_info native; - native.cur = native_addr ? native_addr : get_native_address(context->options, address); + native.cur = native_addr ? native_addr : get_native_address(context->opts, address); if (!native.cur) { return; @@ -2669,7 +2669,7 @@ mov_rrdisp(code, opts->aregs[i], opts->gen.context_reg, offsetof(m68k_context, aregs) + sizeof(uint32_t) * i, SZ_D); } } - mov_rrdisp(code, opts->gen.cycles, opts->gen.context_reg, offsetof(m68k_context, current_cycle), SZ_D); + mov_rrdisp(code, opts->gen.cycles, opts->gen.context_reg, offsetof(m68k_context, cycles), SZ_D); retn(code); opts->load_context_scratch = code->cur; @@ -2691,7 +2691,7 @@ mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, aregs) + sizeof(uint32_t) * i, opts->aregs[i], SZ_D); } } - mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, current_cycle), opts->gen.cycles, SZ_D); + mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, cycles), opts->gen.cycles, SZ_D); mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, target_cycle), opts->gen.limit, SZ_D); retn(code);
--- a/m68k_util.c Mon Apr 29 22:57:49 2024 -0700 +++ b/m68k_util.c Tue Apr 30 00:02:14 2024 -0700 @@ -87,3 +87,13 @@ printf("a%d: %X\n", i, context->aregs[i]); } } + +void m68k_serialize(m68k_context *context, uint32_t pc, serialize_buffer *buf) +{ + //TODO: implement me +} + +void m68k_deserialize(deserialize_buffer *buf, void *vcontext) +{ + //TODO: implement me +}
--- a/menu.c Mon Apr 29 22:57:49 2024 -0700 +++ b/menu.c Tue Apr 30 00:02:14 2024 -0700 @@ -50,7 +50,7 @@ { if (!src || !(guest_addr & 0xFFFF)) { //we may have walked off the end of a memory block, get a fresh native pointer - src = get_native_pointer(guest_addr, (void **)m68k->mem_pointers, &m68k->options->gen); + src = get_native_pointer(guest_addr, (void **)m68k->mem_pointers, &m68k->opts->gen); if (!src) { break; } @@ -72,7 +72,7 @@ { if (!dst || !(guest_addr & 0xFFFF)) { //we may have walked off the end of a memory block, get a fresh native pointer - dst = get_native_pointer(guest_addr, (void **)m68k->mem_pointers, &m68k->options->gen); + dst = get_native_pointer(guest_addr, (void **)m68k->mem_pointers, &m68k->opts->gen); if (!dst) { break; } @@ -86,7 +86,7 @@ uint32_t copy_dir_entry_to_guest(uint32_t dst, m68k_context *m68k, char *name, uint8_t is_dir) { - uint8_t *dest = get_native_pointer(dst, (void **)m68k->mem_pointers, &m68k->options->gen); + uint8_t *dest = get_native_pointer(dst, (void **)m68k->mem_pointers, &m68k->opts->gen); if (!dest) { return 0; } @@ -106,7 +106,7 @@ dst += 2; if (!(dst & 0xFFFF)) { //we may have walked off the end of a memory block, get a fresh native pointer - dest = get_native_pointer(dst, (void **)m68k->mem_pointers, &m68k->options->gen); + dest = get_native_pointer(dst, (void **)m68k->mem_pointers, &m68k->opts->gen); if (!dest) { break; } @@ -158,7 +158,7 @@ } free(ext_list); //terminate list - uint8_t *dest = get_native_pointer(dst, (void **)m68k->mem_pointers, &m68k->options->gen); + uint8_t *dest = get_native_pointer(dst, (void **)m68k->mem_pointers, &m68k->opts->gen); if (dest) { *dest = dest[1] = 0; } @@ -256,7 +256,7 @@ menu->state = 1; } if (m68k->should_return) { - m68k->target_cycle = m68k->current_cycle; + m68k->target_cycle = m68k->cycles; } return context;
--- a/multi_game.c Mon Apr 29 22:57:49 2024 -0700 +++ b/multi_game.c Tue Apr 30 00:02:14 2024 -0700 @@ -7,12 +7,12 @@ gen->bank_regs[0] = address; uint32_t base = (address & 0x3F) << 16, start = 0, end = 0x400000; //find the memmap chunk, so we can properly mask the base value - for (int i = 0; i < context->options->gen.memmap_chunks; i++) + for (int i = 0; i < context->opts->gen.memmap_chunks; i++) { - if (context->options->gen.memmap[i].flags & MMAP_PTR_IDX) { - base &= context->options->gen.memmap[i].mask; - start = context->options->gen.memmap[i].start; - end = context->options->gen.memmap[i].end; + if (context->opts->gen.memmap[i].flags & MMAP_PTR_IDX) { + base &= context->opts->gen.memmap[i].mask; + start = context->opts->gen.memmap[i].start; + end = context->opts->gen.memmap[i].end; break; } }
--- a/nor.c Mon Apr 29 22:57:49 2024 -0700 +++ b/nor.c Tue Apr 30 00:02:14 2024 -0700 @@ -69,7 +69,7 @@ address = address >> 1; } - nor_run(state, m68k, m68k->current_cycle); + nor_run(state, m68k, m68k->cycles); switch (state->mode) { case NOR_NORMAL: @@ -142,14 +142,14 @@ address = address >> 1; } - nor_run(state, m68k, m68k->current_cycle); + nor_run(state, m68k, m68k->cycles); switch (state->cmd_state) { case NOR_CMD_IDLE: if (value == 0xAA && (address & (state->size - 1)) == state->cmd_address1) { state->cmd_state = NOR_CMD_AA; } else { - nor_write_byte(state, address, value, m68k->current_cycle); + nor_write_byte(state, address, value, m68k->cycles); state->cmd_state = NOR_CMD_IDLE; } break; @@ -157,8 +157,8 @@ if (value == 0x55 && (address & (state->size - 1)) == state->cmd_address2) { state->cmd_state = NOR_CMD_55; } else { - nor_write_byte(state, state->cmd_address1, 0xAA, m68k->current_cycle); - nor_write_byte(state, address, value, m68k->current_cycle); + nor_write_byte(state, state->cmd_address1, 0xAA, m68k->cycles); + nor_write_byte(state, address, value, m68k->cycles); state->cmd_state = NOR_CMD_IDLE; } break; @@ -200,9 +200,9 @@ } } } else { - nor_write_byte(state, state->cmd_address1, 0xAA, m68k->current_cycle); - nor_write_byte(state, state->cmd_address2, 0x55, m68k->current_cycle); - nor_write_byte(state, address, value, m68k->current_cycle); + nor_write_byte(state, state->cmd_address1, 0xAA, m68k->cycles); + nor_write_byte(state, state->cmd_address2, 0x55, m68k->cycles); + nor_write_byte(state, address, value, m68k->cycles); } state->cmd_state = NOR_CMD_IDLE; break;
--- a/sega_mapper.c Mon Apr 29 22:57:49 2024 -0700 +++ b/sega_mapper.c Tue Apr 30 00:02:14 2024 -0700 @@ -280,7 +280,7 @@ //ensure USB serial read returns "not-ready" status return 0x02; default: - return read_word(context->last_prefetch_address, (void **)context->mem_pointers, &context->options->gen, context); + return read_word(context->last_prefetch_address, (void **)context->mem_pointers, &context->opts->gen, context); } }
--- a/segacd.c Mon Apr 29 22:57:49 2024 -0700 +++ b/segacd.c Tue Apr 30 00:02:14 2024 -0700 @@ -174,7 +174,7 @@ } m68k_invalidate_code_range(cd->genesis->m68k, cd->base + 0x200000 + (address & ~1), cd->base + 0x200000 + (address & ~1) + 1); cd->sub_paused_wordram = 1; - m68k->sync_cycle = m68k->target_cycle = m68k->current_cycle; + m68k->sync_cycle = m68k->target_cycle = m68k->cycles; m68k->should_return = 1; } else { value &= 0xF; @@ -407,8 +407,8 @@ segacd_context *cd = m68k->system; if (address & 1) { //need to run CD drive because there may be a PCM DMA underway - cdd_run(cd, m68k->current_cycle); - rf5c164_run(&cd->pcm, m68k->current_cycle); + cdd_run(cd, m68k->cycles); + rf5c164_run(&cd->pcm, m68k->cycles); return rf5c164_read(&cd->pcm, address >> 1); } else { return 0xFF; @@ -426,13 +426,13 @@ segacd_context *cd = m68k->system; if (address & 1) { //need to run CD drive because there may be a PCM DMA underway - cdd_run(cd, m68k->current_cycle); - rf5c164_run(&cd->pcm, m68k->current_cycle); + cdd_run(cd, m68k->cycles); + rf5c164_run(&cd->pcm, m68k->cycles); while ((cd->pcm.flags & 0x81) == 1) { //not sounding, but pending write //DMA write conflict presumably adds wait states - m68k->current_cycle += 4; - rf5c164_run(&cd->pcm, m68k->current_cycle); + m68k->cycles += 4; + rf5c164_run(&cd->pcm, m68k->cycles); } rf5c164_write(&cd->pcm, address >> 1, value); } @@ -449,7 +449,7 @@ m68k_context *m68k = vcontext; genesis_context *gen = m68k->system; segacd_context *cd = gen->expansion; - uint16_t open_bus = read_word(m68k->last_prefetch_address, (void **)m68k->mem_pointers, &m68k->options->gen, m68k); + uint16_t open_bus = read_word(m68k->last_prefetch_address, (void **)m68k->mem_pointers, &m68k->opts->gen, m68k); if (cd->bram_cart_id > 7) { // No cart, just return open bus return open_bus; @@ -477,19 +477,19 @@ segacd_context *cd = gen->expansion; if (!(address & 1) || cd->bram_cart_id > 7) { //open bus - return read_byte(m68k->last_prefetch_address | (address & 1), (void **)m68k->mem_pointers, &m68k->options->gen, m68k); + return read_byte(m68k->last_prefetch_address | (address & 1), (void **)m68k->mem_pointers, &m68k->opts->gen, m68k); } address &= 0x3FFFFF; if (address < 0x200000) { if (address < 0x100000) { return cd->bram_cart_id; } - return read_byte(m68k->last_prefetch_address | 1, (void **)m68k->mem_pointers, &m68k->options->gen, m68k); + return read_byte(m68k->last_prefetch_address | 1, (void **)m68k->mem_pointers, &m68k->opts->gen, m68k); } else { address &= 0x1FFFFF; uint32_t end = 0x2000 << (1 + cd->bram_cart_id); if (address >= end) { - return read_byte(m68k->last_prefetch_address | 1, (void **)m68k->mem_pointers, &m68k->options->gen, m68k); + return read_byte(m68k->last_prefetch_address | 1, (void **)m68k->mem_pointers, &m68k->opts->gen, m68k); } return cd->bram_cart[address >> 1]; } @@ -567,7 +567,7 @@ uint32_t cdc_cycle = CYCLE_NEVER; if (mask < 6) { if (cd->gate_array[GA_INT_MASK] & BIT_MASK_IEN6) { - uint32_t subcode_cycle = cd->cdd.subcode_int_pending ? context->current_cycle : cd->cdd.next_subcode_int_cycle; + uint32_t subcode_cycle = cd->cdd.subcode_int_pending ? context->cycles : cd->cdd.next_subcode_int_cycle; if (subcode_cycle != CYCLE_NEVER) { context->int_cycle = subcode_cycle; context->int_num = 6; @@ -591,7 +591,7 @@ } if (mask < 4) { if (cd->gate_array[GA_INT_MASK] & BIT_MASK_IEN4) { - uint32_t cdd_cycle = cd->cdd.int_pending ? context->current_cycle : cd->cdd.next_int_cycle; + uint32_t cdd_cycle = cd->cdd.int_pending ? context->cycles : cd->cdd.next_int_cycle; if (cdd_cycle < context->int_cycle) { context->int_cycle = cdd_cycle; context->int_num = 4; @@ -622,23 +622,23 @@ } } } - if (context->int_cycle > context->current_cycle && context->int_pending == INT_PENDING_SR_CHANGE) { + if (context->int_cycle > context->cycles && context->int_pending == INT_PENDING_SR_CHANGE) { context->int_pending = INT_PENDING_NONE; } - if (context->current_cycle >= context->sync_cycle) { + if (context->cycles >= context->sync_cycle) { context->should_return = 1; - context->target_cycle = context->current_cycle; + context->target_cycle = context->cycles; return; } if (context->status & M68K_STATUS_TRACE || context->trace_pending) { - context->target_cycle = context->current_cycle; + context->target_cycle = context->cycles; return; } context->target_cycle = context->sync_cycle < context->int_cycle ? context->sync_cycle : context->int_cycle; if (context->int_cycle == cdc_cycle && context->int_num == 5) { - uint32_t before = cdc_cycle - cd->m68k->options->gen.clock_divider * 158; //divs worst case + uint32_t before = cdc_cycle - cd->m68k->opts->gen.clock_divider * 158; //divs worst case if (before < context->target_cycle) { - while (before <= context->current_cycle) { + while (before <= context->cycles) { before += cd->cdc.clock_step; } if (before < context->target_cycle) { @@ -652,12 +652,12 @@ { m68k_context *m68k = vcontext; segacd_context *cd = m68k->system; - uint32_t before_cycle = m68k->current_cycle - m68k->options->gen.clock_divider * 4; + uint32_t before_cycle = m68k->cycles - m68k->opts->gen.clock_divider * 4; if (before_cycle >= cd->last_refresh_cycle) { uint32_t num_refresh = (before_cycle - cd->last_refresh_cycle) / REFRESH_INTERVAL; - uint32_t num_full = (m68k->current_cycle - cd->last_refresh_cycle) / REFRESH_INTERVAL; + uint32_t num_full = (m68k->cycles - cd->last_refresh_cycle) / REFRESH_INTERVAL; cd->last_refresh_cycle = cd->last_refresh_cycle + num_full * REFRESH_INTERVAL; - m68k->current_cycle += num_refresh * REFRESH_DELAY; + m68k->cycles += num_refresh * REFRESH_DELAY; } @@ -666,7 +666,7 @@ { case GA_SUB_CPU_CTRL: { uint16_t value = cd->gate_array[reg] & 0xFFFE; - if (cd->periph_reset_cycle == CYCLE_NEVER || (m68k->current_cycle - cd->periph_reset_cycle) > SCD_PERIPH_RESET_CLKS) { + if (cd->periph_reset_cycle == CYCLE_NEVER || (m68k->cycles - cd->periph_reset_cycle) > SCD_PERIPH_RESET_CLKS) { value |= BIT_PRES; } return value; @@ -674,13 +674,13 @@ case GA_MEM_MODE: return cd->gate_array[reg] & 0xFF1F; case GA_CDC_CTRL: - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); return cd->gate_array[reg] | cd->cdc.ar; case GA_CDC_REG_DATA: - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); return lc8951_reg_read(&cd->cdc); case GA_CDC_HOST_DATA: { - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); uint16_t dst = cd->gate_array[GA_CDC_CTRL] >> 8 & 0x7; if (dst == DST_SUB_CPU) { if (cd->gate_array[GA_CDC_CTRL] & BIT_DSR) { @@ -694,14 +694,14 @@ } case GA_STOP_WATCH: case GA_TIMER: - timers_run(cd, m68k->current_cycle); + timers_run(cd, m68k->cycles); return cd->gate_array[reg]; case GA_CDD_STATUS0: case GA_CDD_STATUS1: case GA_CDD_STATUS2: case GA_CDD_STATUS3: case GA_CDD_STATUS4: - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); return cd->gate_array[reg]; break; case GA_FONT_DATA0: @@ -726,7 +726,7 @@ case GA_STAMP_SIZE: case GA_IMAGE_BUFFER_LINES: //these two have bits that change based on graphics operations - cd_graphics_run(cd, m68k->current_cycle); + cd_graphics_run(cd, m68k->cycles); return cd->gate_array[reg]; case GA_TRACE_VECTOR_BASE: //write only @@ -749,12 +749,12 @@ { m68k_context *m68k = vcontext; segacd_context *cd = m68k->system; - uint32_t before_cycle = m68k->current_cycle - m68k->options->gen.clock_divider * 4; + uint32_t before_cycle = m68k->cycles - m68k->opts->gen.clock_divider * 4; if (before_cycle >= cd->last_refresh_cycle) { uint32_t num_refresh = (before_cycle - cd->last_refresh_cycle) / REFRESH_INTERVAL; - uint32_t num_full = (m68k->current_cycle - cd->last_refresh_cycle) / REFRESH_INTERVAL; + uint32_t num_full = (m68k->cycles - cd->last_refresh_cycle) / REFRESH_INTERVAL; cd->last_refresh_cycle = cd->last_refresh_cycle + num_full * REFRESH_INTERVAL; - m68k->current_cycle += num_refresh * REFRESH_DELAY; + m68k->cycles += num_refresh * REFRESH_DELAY; } uint32_t reg = address >> 1; @@ -764,7 +764,7 @@ cd->gate_array[reg] &= 0xF0; cd->gate_array[reg] |= value & (BIT_LEDG|BIT_LEDR); if (value & BIT_PRES) { - cd->periph_reset_cycle = m68k->current_cycle; + cd->periph_reset_cycle = m68k->cycles; } break; case GA_MEM_MODE: { @@ -836,7 +836,7 @@ break; } case GA_CDC_CTRL: { - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); lc8951_ar_write(&cd->cdc, value); //cd->gate_array[reg] &= 0xC000; uint16_t old_dest = cd->gate_array[GA_CDC_CTRL] >> 8 & 0x7; @@ -859,8 +859,8 @@ break; } case GA_CDC_REG_DATA: - cdd_run(cd, m68k->current_cycle); - printf("CDC write %X: %X @ %u\n", cd->cdc.ar, value, m68k->current_cycle); + cdd_run(cd, m68k->cycles); + printf("CDC write %X: %X @ %u\n", cd->cdc.ar, value, m68k->cycles); if (cd->cdc.ar == 6) { cd->cdc_dst_low = 0; //TODO: Confirm if DSR is cleared here on hardware @@ -874,7 +874,7 @@ sub_gate_read16(address, vcontext); break; case GA_CDC_DMA_ADDR: - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); cd->gate_array[reg] = value; cd->cdc_dst_low = 0; //TODO: Confirm if DSR is cleared here on hardware @@ -883,7 +883,7 @@ case GA_STOP_WATCH: //docs say you should only write zero to reset //mcd-verificator comments suggest any value will reset - timers_run(cd, m68k->current_cycle); + timers_run(cd, m68k->cycles); cd->gate_array[reg] = 0; break; case GA_COMM_FLAG: @@ -902,7 +902,7 @@ cd->gate_array[reg] = value; break; case GA_TIMER: - timers_run(cd, m68k->current_cycle); + timers_run(cd, m68k->cycles); cd->gate_array[reg] = value & 0xFF; cd->timer_value = 0; calculate_target_cycle(m68k); @@ -916,14 +916,14 @@ calculate_target_cycle(m68k); break; case GA_CDD_FADER: - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); value &= 0x7FFF; cdd_fader_attenuation_write(&cd->fader, value); cd->gate_array[reg] &= 0x8000; cd->gate_array[reg] |= value; break; case GA_CDD_CTRL: { - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); uint16_t changed = cd->gate_array[reg] ^ value; if (changed & BIT_HOCK) { cd->gate_array[reg] &= ~BIT_HOCK; @@ -942,11 +942,11 @@ case GA_CDD_CMD1: case GA_CDD_CMD2: case GA_CDD_CMD3: - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); cd->gate_array[reg] = value & 0x0F0F; break; case GA_CDD_CMD4: - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); cd->gate_array[reg] = value & 0x0F0F; cdd_mcu_start_cmd_recv(&cd->cdd, cd->gate_array + GA_CDD_CTRL); break; @@ -957,36 +957,36 @@ cd->gate_array[reg] = value; break; case GA_STAMP_SIZE: - cd_graphics_run(cd, m68k->current_cycle); + cd_graphics_run(cd, m68k->cycles); cd->gate_array[reg] &= BIT_GRON; cd->gate_array[reg] |= value & (BIT_SMS|BIT_STS|BIT_RPT); break; case GA_STAMP_MAP_BASE: - cd_graphics_run(cd, m68k->current_cycle); + cd_graphics_run(cd, m68k->cycles); cd->gate_array[reg] = value & 0xFFE0; break; case GA_IMAGE_BUFFER_VCELLS: - cd_graphics_run(cd, m68k->current_cycle); + cd_graphics_run(cd, m68k->cycles); cd->gate_array[reg] = value & 0x1F; break; case GA_IMAGE_BUFFER_START: - cd_graphics_run(cd, m68k->current_cycle); + cd_graphics_run(cd, m68k->cycles); cd->gate_array[reg] = value & 0xFFF8; break; case GA_IMAGE_BUFFER_OFFSET: - cd_graphics_run(cd, m68k->current_cycle); + cd_graphics_run(cd, m68k->cycles); cd->gate_array[reg] = value & 0x3F; break; case GA_IMAGE_BUFFER_HDOTS: - cd_graphics_run(cd, m68k->current_cycle); + cd_graphics_run(cd, m68k->cycles); cd->gate_array[reg] = value & 0x1FF; break; case GA_IMAGE_BUFFER_LINES: - cd_graphics_run(cd, m68k->current_cycle); + cd_graphics_run(cd, m68k->cycles); cd->gate_array[reg] = value & 0xFF; break; case GA_TRACE_VECTOR_BASE: - cd_graphics_run(cd, m68k->current_cycle); + cd_graphics_run(cd, m68k->cycles); cd->gate_array[reg] = value & 0xFFFE; cd_graphics_start(cd); break; @@ -1026,7 +1026,7 @@ case GA_CDD_CMD4: if (!address) { //byte write to $FF804A should not trigger transfer - cdd_run(cd, m68k->current_cycle); + cdd_run(cd, m68k->cycles); cd->gate_array[reg] &= 0x0F; cd->gate_array[reg] |= (value << 8 & 0x0F00); return vcontext; @@ -1095,7 +1095,7 @@ cd->cdc_dst_low = dma_addr & 7; cd->gate_array[GA_CDC_DMA_ADDR] = dma_addr >> 3; //TODO: determine actual main CPU penalty - cd->m68k->current_cycle += 2 * cd->m68k->options->gen.bus_cycles; + cd->m68k->cycles += 2 * cd->m68k->opts->gen.bus_cycles; break; case DST_PROG_RAM: if (can_main_access_prog(cd)) { @@ -1107,7 +1107,7 @@ cd->cdc_dst_low = dma_addr & 7; cd->gate_array[GA_CDC_DMA_ADDR] = dma_addr >> 3; //TODO: determine actual main CPU penalty - cd->m68k->current_cycle += 2 * cd->m68k->options->gen.bus_cycles; + cd->m68k->cycles += 2 * cd->m68k->opts->gen.bus_cycles; break; case DST_WORD_RAM: if (cd->gate_array[GA_MEM_MODE] & BIT_MEM_MODE) { @@ -1150,11 +1150,11 @@ { segacd_context *cd = context->system; - uint32_t num_refresh = (context->current_cycle - cd->last_refresh_cycle) / REFRESH_INTERVAL; + uint32_t num_refresh = (context->cycles - cd->last_refresh_cycle) / REFRESH_INTERVAL; cd->last_refresh_cycle = cd->last_refresh_cycle + num_refresh * REFRESH_INTERVAL; - context->current_cycle += num_refresh * REFRESH_DELAY; + context->cycles += num_refresh * REFRESH_DELAY; - scd_peripherals_run(cd, context->current_cycle); + scd_peripherals_run(cd, context->cycles); if (address) { if (cd->enter_debugger) { genesis_context *gen = cd->genesis; @@ -1176,7 +1176,7 @@ static m68k_context *int_ack(m68k_context *context) { segacd_context *cd = context->system; - scd_peripherals_run(cd, context->current_cycle); + scd_peripherals_run(cd, context->cycles); switch (context->int_pending) { case 1: @@ -1204,8 +1204,8 @@ //Base 68K core has added 4 cycles for a normal int ack cycle already //We add 5 + the current cycle count (in 68K cycles) mod 10 to simulate the //additional variable delay from the use of the 6800 cycle - uint32_t cycle_count = context->current_cycle / context->options->gen.clock_divider; - context->current_cycle += 5 + (cycle_count % 10); + uint32_t cycle_count = context->cycles / context->opts->gen.clock_divider; + context->cycles += 5 + (cycle_count % 10); return context; } @@ -1213,14 +1213,14 @@ void scd_run(segacd_context *cd, uint32_t cycle) { uint8_t m68k_run = !can_main_access_prog(cd); - while (cycle > cd->m68k->current_cycle) { + while (cycle > cd->m68k->cycles) { if (m68k_run && !cd->sub_paused_wordram) { - uint32_t num_refresh = (cd->m68k->current_cycle - cd->last_refresh_cycle) / REFRESH_INTERVAL; + uint32_t num_refresh = (cd->m68k->cycles - cd->last_refresh_cycle) / REFRESH_INTERVAL; cd->last_refresh_cycle = cd->last_refresh_cycle + num_refresh * REFRESH_INTERVAL; - cd->m68k->current_cycle += num_refresh * REFRESH_DELAY; + cd->m68k->cycles += num_refresh * REFRESH_DELAY; - cd->m68k->sync_cycle = cd->enter_debugger ? cd->m68k->current_cycle + 1 : cycle; + cd->m68k->sync_cycle = cd->enter_debugger ? cd->m68k->cycles + 1 : cycle; if (cd->need_reset) { cd->need_reset = 0; m68k_reset(cd->m68k); @@ -1229,10 +1229,10 @@ resume_68k(cd->m68k); } } else { - cd->m68k->current_cycle = cycle; + cd->m68k->cycles = cycle; cd->last_refresh_cycle = cycle; } - scd_peripherals_run(cd, cd->m68k->current_cycle); + scd_peripherals_run(cd, cd->m68k->cycles); } } @@ -1245,7 +1245,7 @@ void scd_adjust_cycle(segacd_context *cd, uint32_t deduction) { deduction = gen_cycle_to_scd(deduction, cd->genesis); - cd->m68k->current_cycle -= deduction; + cd->m68k->cycles -= deduction; cd->stopwatch_cycle -= deduction; if (deduction >= cd->int2_cycle) { cd->int2_cycle = 0; @@ -1281,7 +1281,7 @@ gen_update_refresh_free_access(m68k); genesis_context *gen = m68k->system; segacd_context *cd = gen->expansion; - uint32_t scd_cycle = gen_cycle_to_scd(m68k->current_cycle, gen); + uint32_t scd_cycle = gen_cycle_to_scd(m68k->cycles, gen); scd_run(cd, scd_cycle); uint32_t offset = (address & 0x1FF) >> 1; switch (offset) @@ -1370,7 +1370,7 @@ gen_update_refresh_free_access(m68k); genesis_context *gen = m68k->system; segacd_context *cd = gen->expansion; - uint32_t scd_cycle = gen_cycle_to_scd(m68k->current_cycle, gen); + uint32_t scd_cycle = gen_cycle_to_scd(m68k->cycles, gen); uint32_t reg = (address & 0x1FF) >> 1; if (reg != GA_SUB_CPU_CTRL) { scd_run(cd, scd_cycle); @@ -1380,9 +1380,9 @@ case GA_SUB_CPU_CTRL: { if ((value & BIT_IFL2) && (cd->gate_array[GA_INT_MASK] & BIT_MASK_IEN2)) { if (cd->int2_cycle != CYCLE_NEVER) { - scd_run(cd, scd_cycle - 4 * cd->m68k->options->gen.clock_divider); - while (cd->int2_cycle != CYCLE_NEVER && cd->m68k->current_cycle < scd_cycle) { - scd_run(cd, cd->m68k->current_cycle + cd->m68k->options->gen.clock_divider); + scd_run(cd, scd_cycle - 4 * cd->m68k->opts->gen.clock_divider); + while (cd->int2_cycle != CYCLE_NEVER && cd->m68k->cycles < scd_cycle) { + scd_run(cd, cd->m68k->cycles + cd->m68k->opts->gen.clock_divider); } } cd->int2_cycle = scd_cycle; @@ -1665,7 +1665,7 @@ { cdd_fader_deinit(&cd->fader); rf5c164_deinit(&cd->pcm); - m68k_options_free(cd->m68k->options); + m68k_options_free(cd->m68k->opts); free(cd->m68k); free(cd->bram); free(cd->word_ram);
--- a/trans.c Mon Apr 29 22:57:49 2024 -0700 +++ b/trans.c Tue Apr 30 00:02:14 2024 -0700 @@ -31,12 +31,12 @@ m68k_context * sync_components(m68k_context * context, uint32_t address) { #ifndef NEW_CORE - if (context->current_cycle >= context->target_cycle) { + if (context->cycles >= context->target_cycle) { puts("hit cycle limit"); exit(0); } if (context->status & M68K_STATUS_TRACE || context->trace_pending) { - context->target_cycle = context->current_cycle; + context->target_cycle = context->cycles; } #endif return context; @@ -45,11 +45,7 @@ m68k_context *reset_handler(m68k_context *context) { m68k_print_regs(context); -#ifdef NEW_CORE printf("cycles: %d\n", context->cycles); -#else - printf("cycles: %d\n", context->current_cycle); -#endif exit(0); //unreachable return context; @@ -94,7 +90,7 @@ #ifdef NEW_CORE context->cycles = 20; #else - context->current_cycle = 40; + context->cycles = 40; context->target_cycle = context->sync_cycle = 8000; #endif m68k_reset(context);
--- a/xband.c Mon Apr 29 22:57:49 2024 -0700 +++ b/xband.c Tue Apr 30 00:02:14 2024 -0700 @@ -117,7 +117,7 @@ static xband *get_xband(genesis_context *gen) { if (!gen->extra) { - gen->extra = gen->m68k->options->gen.memmap[0].buffer; + gen->extra = gen->m68k->opts->gen.memmap[0].buffer; gen->m68k->mem_pointers[2] = (uint16_t *)gen->save_storage; } return gen->extra;