Mercurial > repos > blastem
changeset 310:bf440db64086
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
author | Mike Pavone <pavone@retrodev.com> |
---|---|
date | Thu, 09 May 2013 00:30:55 -0700 |
parents | cb6a37861e42 |
children | 56fcbfb8767a |
files | z80_to_x86.c |
diffstat | 1 files changed, 7 insertions(+), 0 deletions(-) [+] |
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--- a/z80_to_x86.c Thu May 09 00:17:12 2013 -0700 +++ b/z80_to_x86.c Thu May 09 00:30:55 2013 -0700 @@ -1016,6 +1016,10 @@ dst = translate_z80_reg(inst, &dst_op, dst, opts); } dst = shl_ir(dst, 1, dst_op.base, SZ_B); + dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_C)); + if (inst->op == Z80_SLL) { + dst = or_ir(dst, 1, dst_op.base, SZ_B); + } if (src_op.mode != MODE_UNUSED) { dst = mov_rr(dst, dst_op.base, src_op.base, SZ_B); } @@ -1049,6 +1053,7 @@ if (src_op.mode != MODE_UNUSED) { dst = mov_rr(dst, dst_op.base, src_op.base, SZ_B); } + dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_C)); dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B); //TODO: Implement half-carry flag dst = cmp_ir(dst, 0, dst_op.base, SZ_B); @@ -1079,6 +1084,7 @@ if (src_op.mode != MODE_UNUSED) { dst = mov_rr(dst, dst_op.base, src_op.base, SZ_B); } + dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_C)); dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B); //TODO: Implement half-carry flag dst = cmp_ir(dst, 0, dst_op.base, SZ_B); @@ -1093,6 +1099,7 @@ } else { dst = z80_save_reg(dst, inst, opts); } + break; case Z80_RLD: dst = zcycles(dst, 8); dst = mov_rr(dst, opts->regs[Z80_HL], SCRATCH1, SZ_W);