# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1551158534 28800
# Node ID 8a29c250f3523c3f85dd76f24c3bbd60cd050159
# Parent  1dc718581aac6552b6de3a172a43849addad3799
More instruction timing fixes in old Z80 core

diff -r 1dc718581aac -r 8a29c250f352 z80_to_x86.c
--- a/z80_to_x86.c	Wed Feb 20 09:42:12 2019 -0800
+++ b/z80_to_x86.c	Mon Feb 25 21:22:14 2019 -0800
@@ -355,6 +355,8 @@
 			}
 			if (inst->reg == Z80_I || inst->ea_reg == Z80_I || inst->reg == Z80_R || inst->ea_reg == Z80_R) {
 				num_cycles += 1;
+			} else if (inst->reg == Z80_USE_IMMED) {
+				num_cycles += 3;
 			}
 			break;
 		case Z80_IMMED:
@@ -368,9 +370,6 @@
 			num_cycles += 8; //3 for displacement, 5 for address addition
 			break;
 		}
-		if (inst->reg == Z80_USE_IMMED) {
-			num_cycles += 3;
-		}
 		cycles(&opts->gen, num_cycles);
 		if (inst->addr_mode & Z80_DIR) {
 			translate_z80_ea(inst, &dst_op, opts, DONT_READ, MODIFY);
@@ -945,7 +944,7 @@
 		} else if(inst->addr_mode == Z80_IMMED) {
 			num_cycles += 3;
 		} else if(z80_size(inst) == SZ_W) {
-			num_cycles += 4;
+			num_cycles += 7;
 		}
 		cycles(&opts->gen, num_cycles);
 		translate_z80_reg(inst, &dst_op, opts);
@@ -1076,7 +1075,7 @@
 		} else if(inst->addr_mode == Z80_IMMED) {
 			num_cycles += 3;
 		} else if(z80_size(inst) == SZ_W) {
-			num_cycles += 4;
+			num_cycles += 7;
 		}
 		cycles(&opts->gen, num_cycles);
 		translate_z80_reg(inst, &dst_op, opts);
@@ -1264,6 +1263,10 @@
 	case Z80_DEC:
 		if(z80_size(inst) == SZ_W) {
 			num_cycles += 2;
+		} else if (inst->addr_mode == Z80_REG_INDIRECT) {
+			num_cycles += 1;
+		} else if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) {
+			num_cycles += 9;
 		}
 		cycles(&opts->gen, num_cycles);
 		translate_z80_reg(inst, &dst_op, opts);
@@ -1917,7 +1920,7 @@
 	}
 	case Z80_SET: {
 		if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) {
-			num_cycles += 8;
+			num_cycles += 4;
 		}
 		cycles(&opts->gen, num_cycles);
 		uint8_t bit;
@@ -1986,7 +1989,7 @@
 	}
 	case Z80_RES: {
 		if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) {
-			num_cycles += 8;
+			num_cycles += 4;
 		}
 		cycles(&opts->gen, num_cycles);
 		uint8_t bit;