# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1490719194 25200
# Node ID 5b90d7669eee248adb62c5e9c6b727ab2442d441
# Parent  208803173ebcd490d410a53dfc48c8f8e86e1d5b
Fix exit trace mode edge case. Call do_sync if trace mode bit is changed in eori sr

diff -r 208803173ebc -r 5b90d7669eee genesis.c
--- a/genesis.c	Tue Mar 28 00:13:35 2017 -0700
+++ b/genesis.c	Tue Mar 28 09:39:54 2017 -0700
@@ -83,7 +83,7 @@
 		old_int_cycle = context->int_cycle;
 	}*/
 	
-	if (context->status & M68K_STATUS_TRACE) {
+	if (context->status & M68K_STATUS_TRACE || context->trace_pending) {
 		context->target_cycle = context->current_cycle;
 		return;
 	}
diff -r 208803173ebc -r 5b90d7669eee m68k_core_x86.c
--- a/m68k_core_x86.c	Tue Mar 28 00:13:35 2017 -0700
+++ b/m68k_core_x86.c	Tue Mar 28 09:39:54 2017 -0700
@@ -2231,7 +2231,7 @@
 	}
 	if (inst->op == M68K_EORI_SR) {
 		xor_irdisp(code, inst->src.params.immed >> 8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
-		if (inst->src.params.immed & 0x700) {
+		if (inst->src.params.immed & 0x8700) {
 			//set int pending flag in case we trigger an interrupt as a result of the mask change
 			mov_irdisp(code, INT_PENDING_SR_CHANGE, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
 			call(code, opts->do_sync);
@@ -2929,17 +2929,20 @@
 	add_ir(code, 16-sizeof(void*), RSP, SZ_PTR);
 	uint32_t adjust_size = code->cur - opts->gen.handle_cycle_limit_int;
 	code->cur = opts->gen.handle_cycle_limit_int;
-	bt_irdisp(code, 7, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
-	code_ptr no_trace = code->cur + 1;
-	jcc(code, CC_NC, no_trace);
+	//handle trace mode
 	cmp_irdisp(code, 0, opts->gen.context_reg, offsetof(m68k_context, trace_pending), SZ_B);
 	code_ptr do_trace = code->cur + 1;
 	jcc(code, CC_NZ, do_trace);
+	bt_irdisp(code, 7, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
+	code_ptr no_trace = code->cur + 1;
+	jcc(code, CC_NC, no_trace);
 	mov_irdisp(code, 1, opts->gen.context_reg, offsetof(m68k_context, trace_pending), SZ_B);
 	*no_trace = code->cur - (no_trace + 1);
+	//handle interrupts
 	cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_cycle), opts->gen.cycles, SZ_D);
 	code_ptr do_int = code->cur + 2; 
 	jcc(code, CC_NC, do_int+512);//force 32-bit displacement
+	//handle component synchronization
 	cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, sync_cycle), opts->gen.cycles, SZ_D);
 	skip_sync = code->cur + 1;
 	jcc(code, CC_C, code->cur + 2);
diff -r 208803173ebc -r 5b90d7669eee trans.c
--- a/trans.c	Tue Mar 28 00:13:35 2017 -0700
+++ b/trans.c	Tue Mar 28 09:39:54 2017 -0700
@@ -24,7 +24,7 @@
 	if (context->current_cycle > 0x80000000) {
 		context->current_cycle -= 0x80000000;
 	}
-	if (context->status & 0x80) {
+	if (context->status & M68K_STATUS_TRACE || context->trace_pending) {
 		context->target_cycle = context->current_cycle;
 	}
 	return context;