# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1647675725 25200
# Node ID 3ef9456b76cf7fa020564b179926e3bc8d1274c0
# Parent  01fcbcba5cf87dc16ffd655481f0f05db91fb357
Fix a crash regression from word RAM interleave changes

diff -r 01fcbcba5cf8 -r 3ef9456b76cf segacd.c
--- a/segacd.c	Sat Mar 19 00:14:07 2022 -0700
+++ b/segacd.c	Sat Mar 19 00:42:05 2022 -0700
@@ -281,7 +281,7 @@
 	segacd_context *cd = gen->expansion;
 	if (cd->gate_array[GA_MEM_MODE] & BIT_MEM_MODE) {
 		cd->word_ram[address + cd->bank_toggle] = value;
-		m68k_invalidate_code_range(m68k, cd->base + address, address + 1);
+		m68k_invalidate_code_range(m68k, cd->base + 0x200000 + address, cd->base + 0x200000 + address + 1);
 	}
 	return vcontext;
 }
@@ -300,7 +300,7 @@
 			cd->word_ram[address + cd->bank_toggle] &= 0xFF;
 			cd->word_ram[address + cd->bank_toggle] |= value << 8;
 		}
-		m68k_invalidate_code_range(m68k, cd->base + (address & ~1), address + 1);
+		m68k_invalidate_code_range(m68k, cd->base + 0x200000 + (address & ~1), cd->base + 0x200000 + address + 1);
 	}
 	return vcontext;
 }