Mon, 27 Jan 2014 22:12:22 -0800 |
Michael Pavone |
Fix timing of certain ld and jp instructions in the Z80 core
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Mon, 06 Jan 2014 22:54:05 -0800 |
Michael Pavone |
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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Tue, 10 Sep 2013 23:31:08 -0700 |
Mike Pavone |
Added copyright notice to source files and added GPL license text in COPYING
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Sat, 29 Jun 2013 17:15:08 -0700 |
Mike Pavone |
Add support for loading GST format savestates
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Mon, 24 Jun 2013 21:32:25 -0700 |
Mike Pavone |
Fix access to int_enable_cycle in EI
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Sat, 15 Jun 2013 23:10:48 -0700 |
Mike Pavone |
Fix DI
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Fri, 14 Jun 2013 23:27:01 -0700 |
Mike Pavone |
Fix adc and sbc
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Thu, 13 Jun 2013 22:23:15 -0700 |
Mike Pavone |
Fix LDIR
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Tue, 11 Jun 2013 23:09:57 -0700 |
Mike Pavone |
Bail out on attempt to run code from bank area until it is properly supported
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Sat, 08 Jun 2013 11:31:52 -0700 |
Mike Pavone |
Use a call instruction to figure out the original native address when retranslating so that it does not get lost when the byte transforms from a instruction word to extension word
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Thu, 06 Jun 2013 08:45:54 -0700 |
Mike Pavone |
Removed out of date TODO
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Thu, 06 Jun 2013 08:19:25 -0700 |
Mike Pavone |
Fix LDD and LDDR
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Wed, 05 Jun 2013 22:55:23 -0700 |
Mike Pavone |
Fix dec and inc when the operand is in memory
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Wed, 05 Jun 2013 18:47:39 -0700 |
Mike Pavone |
Fix LDI
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Tue, 04 Jun 2013 22:30:49 -0700 |
Mike Pavone |
Fix set/res when the operand is in memory
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Sun, 02 Jun 2013 21:12:26 -0700 |
Mike Pavone |
Fix cycle count for inc and dec
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Sun, 02 Jun 2013 20:14:27 -0700 |
Mike Pavone |
Bunch of Z80 debugger improvements
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Fri, 31 May 2013 20:46:56 -0700 |
Mike Pavone |
Fix P condition in Z80 core
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Fri, 31 May 2013 19:43:13 -0700 |
Mike Pavone |
Partial implementation of Z80 debugger
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Wed, 29 May 2013 00:13:48 -0700 |
Mike Pavone |
Fix push AF
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Mon, 27 May 2013 20:37:55 -0700 |
Mike Pavone |
Fix sizeof expression passed to malloc in z80_init to avoid a minor memory error
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Tue, 14 May 2013 21:59:56 -0700 |
Mike Pavone |
Some Z80 interrupt fixes
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Thu, 09 May 2013 20:09:49 -0700 |
Mike Pavone |
Fix return address for RST
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Thu, 09 May 2013 19:38:28 -0700 |
Mike Pavone |
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
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Thu, 09 May 2013 19:24:18 -0700 |
Mike Pavone |
Fix terminal instruction detection in disassembler
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Thu, 09 May 2013 18:36:21 -0700 |
Mike Pavone |
Properly handle instructions that use boty IYH and IYL
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Thu, 09 May 2013 00:33:06 -0700 |
Mike Pavone |
Set the N flag to the correct value for DEC instructions
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Thu, 09 May 2013 00:30:55 -0700 |
Mike Pavone |
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
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Thu, 09 May 2013 00:17:12 -0700 |
Mike Pavone |
Correctly set the N flag for SBC
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Thu, 09 May 2013 00:14:54 -0700 |
Mike Pavone |
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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Wed, 08 May 2013 23:44:49 -0700 |
Mike Pavone |
Complete flag behavior for Z80 BIT instruction
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Wed, 08 May 2013 23:31:19 -0700 |
Mike Pavone |
Properly handle negative displacements in Z80 core
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Wed, 08 May 2013 23:29:21 -0700 |
Mike Pavone |
Contrary to the official documenation, OR and AND also set PV based on parity instead of overflow
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Wed, 08 May 2013 23:20:41 -0700 |
Mike Pavone |
Set PV flag based on parity, not overflow for XOR
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Wed, 08 May 2013 23:17:54 -0700 |
Mike Pavone |
BIT was setting the zero flag to the opposite of what it should have. This is now fixed.
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Wed, 08 May 2013 23:12:08 -0700 |
Mike Pavone |
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
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Wed, 08 May 2013 23:03:18 -0700 |
Mike Pavone |
Compare src_op.mode with the correct constant in shift/rotate instructions
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Wed, 08 May 2013 22:49:50 -0700 |
Mike Pavone |
Fix IX/IY register selection when the direction bit is set
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Wed, 08 May 2013 22:46:03 -0700 |
Mike Pavone |
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
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Wed, 08 May 2013 17:39:13 -0700 |
Mike Pavone |
Fix stupid copy-pasta bug in XOR
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Wed, 08 May 2013 17:32:28 -0700 |
Mike Pavone |
Fix byte order of pop AF
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Wed, 08 May 2013 14:40:48 -0700 |
Mike Pavone |
Added z80 test generator and z80 test runner.
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Sun, 05 May 2013 11:17:37 -0700 |
Mike Pavone |
Implement RRD and implement flags on RLD
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Sat, 04 May 2013 18:51:53 -0700 |
Mike Pavone |
Implemente RLD
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Sat, 04 May 2013 16:23:28 -0700 |
Mike Pavone |
Implement HALT (sort of tested)
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Sat, 04 May 2013 15:58:15 -0700 |
Mike Pavone |
Implement IN and OUT (untested)
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Sat, 04 May 2013 15:15:55 -0700 |
Mike Pavone |
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
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Sat, 04 May 2013 14:36:50 -0700 |
Mike Pavone |
Remove deferred address entries from abandoned translations inside z80_retrans_inst
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Fri, 03 May 2013 20:18:28 -0700 |
Mike Pavone |
Fix native address lookup in bannked memory area
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Fri, 03 May 2013 19:27:32 -0700 |
Mike Pavone |
Using push/pop inside translated code is not compatible with the current way the Z80 core returns to the caller
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Fri, 03 May 2013 18:49:48 -0700 |
Mike Pavone |
Implement shift instructions (untested)
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Thu, 02 May 2013 22:39:39 -0700 |
Mike Pavone |
Implement CPL and NEG (untested)
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Thu, 02 May 2013 22:28:40 -0700 |
Mike Pavone |
Implement LDD and LDDR
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Thu, 02 May 2013 22:26:47 -0700 |
Mike Pavone |
Implement LDI
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Thu, 02 May 2013 22:18:22 -0700 |
Mike Pavone |
Fix IX/IY displace modes. Fix check for registers requiring REX.
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Thu, 02 May 2013 21:54:04 -0700 |
Mike Pavone |
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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Thu, 02 May 2013 00:10:24 -0700 |
Mike Pavone |
Don't mix *H regs with the REX prefix
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Wed, 01 May 2013 23:12:29 -0700 |
Mike Pavone |
Fix some more retranslation bugs in the Z80 core
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Wed, 01 May 2013 20:09:53 -0700 |
Mike Pavone |
Fix a crash bug in instruction retranslation
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Tue, 30 Apr 2013 20:33:30 -0700 |
Mike Pavone |
Implement ld to and from the I and R registers
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