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log genesis.c @ 1395:
efa7225e0f07
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Wed, 07 Jun 2017 23:06:14 -0700
Michael Pavone
Initial work to support parallel NOR flash and the Magistr 16
Sun, 28 May 2017 21:03:55 -0700
Michael Pavone
Implemented SMS pause button
Tue, 23 May 2017 23:47:40 -0700
Michael Pavone
Go back to resetting the refresh counter after a DMA. Probably not quite correct as it is probably reset on VDP triggered refresh, but this is close enough for now given the general limitations with my refresh code. VDP FIFO Testing seems to be passing 100% reliably again (was occassionally failing still with the last commit)
Tue, 23 May 2017 23:17:24 -0700
Michael Pavone
Fixed regression from VDP sync changes. Direct color DMA demos are now achieving stable sync again
Tue, 23 May 2017 23:00:32 -0700
Michael Pavone
Attempt at improving refresh emulation
Tue, 23 May 2017 21:09:38 -0700
Michael Pavone
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Fri, 19 May 2017 20:54:04 -0700
Michael Pavone
Added some code to try and prevent Z80 accesses and refresh cycles from screwing up interrupt latency more than on hardware
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