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log backend_x86.c @ 1880:e77f7a7c79a5

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Sun, 31 Dec 2017 14:08:47 -0800 Michael Pavone Fix accidental add to RSP with SZ_D and SZ_PTR. Using SZ_D breakse when the stack is located outside of the 32-bit addressable range
Wed, 13 Sep 2017 21:06:25 -0700 Michael Pavone Preserve original address when retranslating instructions instead of switching to the lowest alias
Tue, 03 Jan 2017 21:18:42 -0800 Michael Pavone Fix RAM flag offset calculation to take into account the existence of non-writeable MMAP_CODE chunks
Thu, 22 Dec 2016 10:51:33 -0800 Michael Pavone More cleanup in preparation for SMS/Mark III support
Wed, 14 Dec 2016 23:26:12 -0800 Michael Pavone Fix a subtle bug in interrupt handling introduced with the move to a single cycle register in the Z80 core. Fixes regression in Puyo Puyo 2
Mon, 12 Dec 2016 19:21:22 -0800 Michael Pavone Fix to the fix of handling of self modifying code. Was ORing the base address with the wrong register before calling the modified code handler
Thu, 06 Oct 2016 22:25:12 -0700 Michael Pavone Made some optimizations to gen_mem_fun to keep the size of chunk handler sections within range of a single byte displacement
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