Mercurial > repos > blastem
log vdp.h @ 1322:b1423d432c0e
| age | author | description |
|---|---|---|
| Tue, 18 Apr 2017 19:27:10 -0700 | Michael Pavone | Initial stab at implementing the output disable/layer selection bits of the VDP test register |
| Sun, 16 Apr 2017 16:40:04 -0700 | Michael Pavone | Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support |
| Mon, 06 Mar 2017 00:23:35 -0800 | Michael Pavone | Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill |
| Sun, 15 Jan 2017 15:07:24 -0800 | Michael Pavone | Initial work on emulating top and bottom border area |
| Thu, 05 Jan 2017 00:36:23 -0800 | Michael Pavone | Implemented Mode 4 H conter latching |
| Wed, 04 Jan 2017 20:43:22 -0800 | Michael Pavone | Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions |
| Sun, 01 Jan 2017 21:06:32 -0800 | Michael Pavone | Update Mode 4 rendering to match logic analyzer captures |