log cpu_dsl.py @ 1745:a8f04b0ab744

age author description
Wed, 06 Feb 2019 08:54:09 -0800 Michael Pavone Fixes to DAA, SCF and CCF to pass ZEXALL in new Z80 core
Tue, 05 Feb 2019 19:29:54 -0800 Michael Pavone Fixed half-carry flag calcuation for adc/sbc in new Z80 core
Mon, 04 Feb 2019 23:46:35 -0800 Michael Pavone Fixed CPI/CPD/CPIR/CPDR in new Z80 core
Mon, 04 Feb 2019 22:20:51 -0800 Michael Pavone Implement DD/FD prefixes for instructions that don't reference HL
Mon, 04 Feb 2019 21:43:43 -0800 Michael Pavone Fixed some issues involving conditional execution and temporaries/constant folding
Sun, 03 Feb 2019 11:05:40 -0800 Michael Pavone Get new Z80 core running in CPM harness
Sun, 03 Feb 2019 10:40:41 -0800 Michael Pavone Implemented the rest of the block move instructions in new Z80 core
Sat, 02 Feb 2019 23:02:19 -0800 Michael Pavone Implemented LDI in new Z80 core
Sat, 02 Feb 2019 15:35:15 -0800 Michael Pavone Implemented RES instruction in new Z80 core
Fri, 01 Feb 2019 22:16:56 -0800 Michael Pavone Miscellaneous small fixes to new Z80 core
Thu, 31 Jan 2019 23:33:36 -0800 Michael Pavone Implemented shift instructions in new Z80 core
Thu, 31 Jan 2019 23:03:51 -0800 Michael Pavone Implemented the rest of the rotate instructions in new Z80 core