log m68k_core_x86.c @ 2280:9ead0fe69d9b

age author description
Sun, 08 Jan 2023 14:20:43 -0800 Michael Pavone Fix edge case in m68k_invalidate_code_range that caused problems when loading save states
Mon, 26 Dec 2022 07:17:29 -0800 Michael Pavone Hopefully make older versions of gcc happy
Sun, 25 Dec 2022 18:16:44 -0800 Michael Pavone Avoid code mem allocation bomb when a div instruction gets rewritten
Wed, 21 Sep 2022 23:16:39 -0700 Michael Pavone Fix crash regression in m68k bit instruction implementation
Thu, 08 Sep 2022 20:50:18 -0700 Michael Pavone Make sure 68K interrupt is executed immediately when resuming core if it has a target cycle <= current. Fixes IRQ tests in mcd-verificator
Mon, 05 Sep 2022 12:00:02 -0700 Michael Pavone Fix implementation ot 68K trapv instruction
Mon, 05 Sep 2022 01:15:15 -0700 Michael Pavone Fix some 68K exception processing cycle times
Mon, 05 Sep 2022 00:49:03 -0700 Michael Pavone Fix bad 68K instruction timings revealed by Ti_'s test ROM, except those that involve exception timing
Fri, 11 Feb 2022 22:55:01 -0800 Michael Pavone Fix regression in booting games with Japanese Mega CD BIOS
Wed, 09 Feb 2022 23:39:33 -0800 Michael Pavone Fix handling of address error for 32-bit accesses
Sat, 05 Feb 2022 16:41:01 -0800 Michael Pavone Fix instruction retranslation for write protectable region of SCD Program RAM
Tue, 18 Jan 2022 00:03:50 -0800 Michael Pavone Implement enough of Sega CD gate array and Sub CPU to pass Sik's Mode 1 test ROM segacd
Wed, 10 Jun 2020 19:08:41 -0700 Michael Pavone Fix cycle timing of a number of 68K instructions
Sat, 25 Apr 2020 18:10:40 -0700 Michael Pavone Fix instruction timing for addq.w #i, (ay) in dynarec
Sun, 07 Apr 2019 00:06:29 -0700 Michael Pavone Get 64-bit builds working for Windows target