log cpu_dsl.py @ 1702:73ac2e59fa3f

age author description
Sun, 27 Jan 2019 14:37:37 -0800 Michael Pavone Implemented sbc instruction in CPU DSL
Sun, 27 Jan 2019 05:55:08 -0800 Michael Pavone Added adc instruction to CPU DSL
Fri, 25 Jan 2019 14:30:55 -0800 Michael Pavone Output tables in order specified by the extra_tables field so the user can deal with dependencies between tables
Fri, 25 Jan 2019 14:13:46 -0800 Michael Pavone Fix constant propagation to a non-ephemeral destination in CPU DSL
Fri, 25 Jan 2019 13:55:30 -0800 Michael Pavone Fixed missing semicolon in coalesceFlags
Fri, 25 Jan 2019 13:45:58 -0800 Michael Pavone Added new sext instruction for sign extension to CPU sdl
Sat, 06 Oct 2018 17:33:15 -0700 Michael Pavone Implement program ROM reads
Thu, 04 Oct 2018 19:12:56 -0700 Michael Pavone Add the ability for a CPU definition to reference arbitrary C includes and use it to add a placeholder definition of svp_read_16
Mon, 01 Oct 2018 19:16:54 -0700 Michael Pavone Clean up warnings from -1 case
Mon, 01 Oct 2018 19:11:17 -0700 Michael Pavone Getting SVP core closer to compiling
Tue, 25 Sep 2018 09:33:46 -0700 Michael Pavone Fix implementation cmp+condition version of if in CPU DSL
Mon, 24 Sep 2018 19:09:16 -0700 Michael Pavone Support immediate operands for ld and alu ops in SVP. Support double indirect and immediate address modes for alu ops. Fixed DSL issues revealed by those changes