| Tue, 18 Jan 2022 00:03:50 -0800 |
Michael Pavone |
Implement enough of Sega CD gate array and Sub CPU to pass Sik's Mode 1 test ROM
segacd
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| Sat, 15 Jan 2022 13:15:21 -0800 |
Michael Pavone |
Merge from default
segacd
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| Sat, 01 Jan 2022 18:54:46 -0800 |
Michael Pavone |
Support Sega mapper without 'SEGA SSF' in header or ROM DB entry and implement a subset of the extended Sega mapper implemented in the Mega Everdrive when 'SEGA SSF' is present
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| Thu, 05 Aug 2021 09:29:33 -0700 |
Michael Pavone |
Merge from default
mame_interp
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| Sun, 07 Mar 2021 22:44:33 -0800 |
Michael Pavone |
Implement TMSS VDP lock
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| Sun, 21 Feb 2021 14:35:16 -0800 |
Michael Pavone |
Implement TMSS ROM and cart mapping register
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| Sat, 09 May 2020 23:39:44 -0700 |
Michael Pavone |
Merge from default
mame_interp
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| Fri, 08 May 2020 11:40:30 -0700 |
Michael Pavone |
Add an event log soft flush and call it twice per frame in between hard flushes to netplay latency when there are insufficient hardware updates to flush packets in the middle of a frame
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| Wed, 29 Apr 2020 01:00:57 -0700 |
Michael Pavone |
WIP netplay support
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| Sat, 18 Apr 2020 11:42:53 -0700 |
Michael Pavone |
Merge from default
mame_interp
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| Wed, 25 Mar 2020 22:59:59 -0700 |
Michael Pavone |
Some partial work on TMSS registers, more accurate open bus locations and implement machine freezes for unmapped areas in the IO region
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| Tue, 12 Mar 2019 21:59:52 -0700 |
Michael Pavone |
Remove MAME Z80 core in favor of my new Z80 core
mame_interp
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| Fri, 01 Mar 2019 14:17:29 -0800 |
Michael Pavone |
Merge from default
mame_interp
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| Sat, 16 Feb 2019 13:15:09 -0800 |
Michael Pavone |
Fix size of relocated Z80 bank register field
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| Sun, 10 Feb 2019 11:58:23 -0800 |
Michael Pavone |
Initial attempt at interrupts in new Z80 core and integrating it into main executable
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