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log backend_x86.c @ 1109:
4bc27caa6e20
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Wed, 14 Dec 2016 23:26:12 -0800
Michael Pavone
Fix a subtle bug in interrupt handling introduced with the move to a single cycle register in the Z80 core. Fixes regression in Puyo Puyo 2
Mon, 12 Dec 2016 19:21:22 -0800
Michael Pavone
Fix to the fix of handling of self modifying code. Was ORing the base address with the wrong register before calling the modified code handler
Thu, 06 Oct 2016 22:25:12 -0700
Michael Pavone
Made some optimizations to gen_mem_fun to keep the size of chunk handler sections within range of a single byte displacement
Thu, 06 Oct 2016 21:11:58 -0700
Michael Pavone
Remove hacky assumption about Genesis memory map in M68K core
Thu, 06 Oct 2016 09:25:43 -0700
Michael Pavone
Fix handling of MMAP_CODE chunks that also have MMAP_PTR_IDX set
Wed, 27 Jul 2016 22:46:22 -0700
Michael Pavone
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Tue, 26 Apr 2016 23:13:37 -0700
Michael Pavone
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
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