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log trans.c @ 1460:
4929325c3ce0
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Tue, 28 Mar 2017 09:39:54 -0700
Michael Pavone
Fix exit trace mode edge case. Call do_sync if trace mode bit is changed in eori sr
Tue, 28 Mar 2017 00:13:35 -0700
Michael Pavone
Implemented M68K trace mode. Some edge cases/SR update paths still need work
Thu, 06 Oct 2016 09:34:31 -0700
Michael Pavone
Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Wed, 28 Oct 2015 19:40:01 -0700
Michael Pavone
Get trans program compiling again
Sat, 16 May 2015 22:42:26 -0700
Michael Pavone
Fix trans so it compiles again
Mon, 03 Mar 2014 21:08:43 -0800
Michael Pavone
Make some small changes in trans so that it is more likely to produce the same output as mustrans when given misbehaving programs. Add lea to testcases.txt. Improve the output of comparetest.py so that known issues can easily be separated from new ones.
Sun, 02 Mar 2014 16:34:29 -0800
Michael Pavone
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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