Sat, 30 Dec 2017 18:27:06 -0800 |
Michael Pavone |
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
mame_interp
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Wed, 27 Dec 2017 13:46:52 -0800 |
Michael Pavone |
Super hacky integration of the version of Musashi from MAME
mame_interp
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Wed, 13 Dec 2017 09:44:41 -0800 |
Michael Pavone |
Added code for initializing a combined Genesis + Sega CD system when a Sega CD ISO is loaded
segacd
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Fri, 24 Nov 2017 20:52:40 -0800 |
Michael Pavone |
Fix genesis save state loading via Nuklear UI, sms probably still needs work
nuklear_ui
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Fri, 24 Nov 2017 12:04:02 -0800 |
Michael Pavone |
Refactored save slot related logic to reduce duplication and allow reuse in new UI. Get state loading/saving mostly working in new UI
nuklear_ui
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Thu, 19 Oct 2017 03:21:24 -0700 |
Michael Pavone |
Implemented Z80 IM 2 and attempted correct intack cycle delay
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Tue, 29 Aug 2017 19:43:38 -0700 |
Michael Pavone |
Make initial bank register state stored in bank_regs match what is put in to mem_pointers for the sega/SSF2 mapper. Invalidate RAM code ranges on RAM deserialization
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Tue, 29 Aug 2017 00:36:25 -0700 |
Michael Pavone |
Fix savestate path calculation in genesis load_state
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Mon, 28 Aug 2017 22:40:33 -0700 |
Michael Pavone |
Save and restore Z80 bank register in native save states
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Sun, 27 Aug 2017 18:15:00 -0700 |
Michael Pavone |
Save/restore mapper state in native save states
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Thu, 24 Aug 2017 19:28:56 -0700 |
Michael Pavone |
Allow actually saving a save state in more Z80 states. Save busreq/reset state in bus arbiter section for "native" save states
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Wed, 16 Aug 2017 20:06:28 -0700 |
Michael Pavone |
Added save states to SMS emulation
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Wed, 09 Aug 2017 23:26:51 -0700 |
Michael Pavone |
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
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Sun, 06 Aug 2017 00:06:36 -0700 |
Michael Pavone |
WIP - New savestate format
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Mon, 26 Jun 2017 21:13:17 -0700 |
Michael Pavone |
Fix DMA from byte-wide SRAM
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