Wed, 27 Apr 2016 23:11:24 -0700 |
Michael Pavone |
Implement privelege violation exceptions
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Tue, 26 Apr 2016 23:13:37 -0700 |
Michael Pavone |
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
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Tue, 26 Apr 2016 00:07:15 -0700 |
Michael Pavone |
Implement illegal instruction trap
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Sun, 24 Apr 2016 02:19:48 -0700 |
Michael Pavone |
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
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Sun, 24 Apr 2016 00:22:38 -0700 |
Michael Pavone |
Fix order of writes for move.l with a predec destination
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Thu, 29 Oct 2015 19:06:06 -0700 |
Michael Pavone |
Implement TRAPV
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Wed, 28 Oct 2015 19:45:24 -0700 |
Michael Pavone |
Implement TAS
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Fri, 22 May 2015 23:49:32 -0700 |
Michael Pavone |
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
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Thu, 08 Jan 2015 21:00:21 -0800 |
Michael Pavone |
Moved m68k_save_result to m68k_core.c
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Thu, 08 Jan 2015 19:11:56 -0800 |
Michael Pavone |
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
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Fri, 26 Dec 2014 15:45:31 -0800 |
Michael Pavone |
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
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Sat, 08 Mar 2014 00:15:09 -0800 |
Michael Pavone |
Move translate_m68k_movem to m68k_core.c
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Fri, 07 Mar 2014 23:26:46 -0800 |
Michael Pavone |
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
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Fri, 07 Mar 2014 19:35:13 -0800 |
Michael Pavone |
Combine andi ccr/sr and ori ccr/sr.
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