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log m68k_core_x86.c @ 1585:15116d4fdf40

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Fri, 18 May 2018 19:00:10 -0700 Michael Pavone Fix cycle counts for BCD instructions, RESET, and MOVE from SR
Thu, 17 May 2018 00:43:16 -0700 Michael Pavone Fix instruction timing for a number of instructions with only a single operand
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