log m68k_to_x86.c @ 127:0a0743a30ca1

age author description
Sat, 29 Dec 2012 22:22:53 -0800 Mike Pavone Fix check in translate_m68k_src that deals with instructions for which both operands are registers that are not mapped to a native x86-64 register
Sat, 29 Dec 2012 22:11:28 -0800 Mike Pavone Fix encoding of movsx instruction when used with new (i.e. r9-r15) registers. This fixes the indexed addressing modes when used with a word-wide index register
Sat, 29 Dec 2012 21:55:42 -0800 Mike Pavone Some fixes for translating code in located in RAM
Sat, 29 Dec 2012 21:10:07 -0800 Mike Pavone Implement the rest of the bit instructions
Sat, 29 Dec 2012 20:33:39 -0800 Mike Pavone Implemented ROL and ROR
Sat, 29 Dec 2012 12:52:19 -0800 Mike Pavone Fix logic for switching between USP and SSP
Fri, 28 Dec 2012 22:47:10 -0800 Mike Pavone Fix return address pushed to stack for jsr
Fri, 28 Dec 2012 21:36:22 -0800 Mike Pavone cycles should return dst
Fri, 28 Dec 2012 21:20:14 -0800 Mike Pavone Implement pea (untested).
Fri, 28 Dec 2012 17:59:41 -0800 Mike Pavone Defer the correct address for pc relative jsr/jmp
Fri, 28 Dec 2012 17:57:43 -0800 Mike Pavone Implement scc (untested)
Fri, 28 Dec 2012 15:16:36 -0800 Mike Pavone Implement more address modes for jsr
Fri, 28 Dec 2012 14:30:25 -0800 Mike Pavone Fix areg indexed mode for move dst
Fri, 28 Dec 2012 11:07:13 -0800 Mike Pavone Implement ORI to CCR/SR
Fri, 28 Dec 2012 10:37:09 -0800 Mike Pavone Implemented move from SR