Sat, 29 Dec 2012 22:22:53 -0800 |
Mike Pavone |
Fix check in translate_m68k_src that deals with instructions for which both operands are registers that are not mapped to a native x86-64 register
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Sat, 29 Dec 2012 22:11:28 -0800 |
Mike Pavone |
Fix encoding of movsx instruction when used with new (i.e. r9-r15) registers. This fixes the indexed addressing modes when used with a word-wide index register
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Sat, 29 Dec 2012 21:55:42 -0800 |
Mike Pavone |
Some fixes for translating code in located in RAM
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Sat, 29 Dec 2012 21:10:07 -0800 |
Mike Pavone |
Implement the rest of the bit instructions
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Sat, 29 Dec 2012 20:33:39 -0800 |
Mike Pavone |
Implemented ROL and ROR
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Sat, 29 Dec 2012 12:52:19 -0800 |
Mike Pavone |
Fix logic for switching between USP and SSP
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Fri, 28 Dec 2012 22:47:10 -0800 |
Mike Pavone |
Fix return address pushed to stack for jsr
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Fri, 28 Dec 2012 21:36:22 -0800 |
Mike Pavone |
cycles should return dst
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Fri, 28 Dec 2012 21:20:14 -0800 |
Mike Pavone |
Implement pea (untested).
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Fri, 28 Dec 2012 17:59:41 -0800 |
Mike Pavone |
Defer the correct address for pc relative jsr/jmp
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Fri, 28 Dec 2012 17:57:43 -0800 |
Mike Pavone |
Implement scc (untested)
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Fri, 28 Dec 2012 15:16:36 -0800 |
Mike Pavone |
Implement more address modes for jsr
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Fri, 28 Dec 2012 14:30:25 -0800 |
Mike Pavone |
Fix areg indexed mode for move dst
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Fri, 28 Dec 2012 11:07:13 -0800 |
Mike Pavone |
Implement ORI to CCR/SR
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Fri, 28 Dec 2012 10:37:09 -0800 |
Mike Pavone |
Implemented move from SR
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