Mercurial > repos > blastem
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Added some preliminary support for interpreting Z80 code from non-RAM addressesFri, 20 Jun 2014 07:57:32 -0700, by Michael Pavone
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Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loadedThu, 19 Jun 2014 19:50:16 -0700, by Michael Pavone
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Slight cleanup of vint handling on the Z80Thu, 19 Jun 2014 08:14:35 -0700, by Michael Pavone
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Remove debug printf that escaped into my previous commitWed, 18 Jun 2014 16:39:42 -0700, by Michael Pavone
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Fix most of the breakage caused by the vcounter/hcounter changesWed, 18 Jun 2014 16:30:19 -0700, by Michael Pavone
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Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently thoughTue, 17 Jun 2014 19:01:01 -0700, by Michael Pavone
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Added support for JR and JRcc in Z80 test generatorMon, 29 Dec 2014 21:36:17 -0800, by Michael Pavone
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Added support for JPcc in Z80 test generatorMon, 29 Dec 2014 21:24:12 -0800, by Michael Pavone
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Added support for JP in Z80 test generatorMon, 29 Dec 2014 20:56:05 -0800, by Michael Pavone
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Add support for Z80 access to VDP via bank areaMon, 29 Dec 2014 00:41:36 -0800, by Michael Pavone
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Update .hgignoreMon, 29 Dec 2014 00:14:33 -0800, by Michael Pavone
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Fix flag mask for m68k notMon, 29 Dec 2014 00:14:21 -0800, by Michael Pavone
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Fix opsize for sbcd in 68K instruction decoder. This fixes the timer bug in Strider 2Sun, 28 Dec 2014 17:58:43 -0800, by Michael Pavone
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Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the processSun, 28 Dec 2014 17:25:36 -0800, by Michael Pavone
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Fix divide by zero exception return address when div instruction is bigger than 1 wordSat, 27 Dec 2014 15:49:15 -0800, by Michael Pavone
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Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres regSat, 27 Dec 2014 14:51:50 -0800, by Michael Pavone
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Uncomment 68000 testcasesSat, 27 Dec 2014 14:50:50 -0800, by Michael Pavone
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Don't use out of bounds displacements in indexed mode even if our targeted address is out of RAM rangeSat, 27 Dec 2014 14:50:28 -0800, by Michael Pavone
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Fix memory map flags in ztestrunFri, 26 Dec 2014 21:26:25 -0800, by Michael Pavone
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Fix mask for bank area in Z80 memory mapFri, 26 Dec 2014 20:46:56 -0800, by Michael Pavone
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Fix a bug in ori to SR that was swapping USP and SSP inappropriatelyFri, 26 Dec 2014 19:38:27 -0800, by Michael Pavone
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Get Z80 banked access sort of working againFri, 26 Dec 2014 19:37:59 -0800, by Michael Pavone
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Fix reg-indirect mode for RBP/R13Fri, 26 Dec 2014 19:36:41 -0800, by Michael Pavone
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Set int_cycle to CYCLE_NEVER in sync_z80 so that the interrupt routine isn't taken inappropriately now that the kludge in handle_cycle_limit_int has been removedFri, 26 Dec 2014 15:46:53 -0800, by Michael Pavone
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Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactorFri, 26 Dec 2014 15:45:31 -0800, by Michael Pavone
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Add Z80 test runner Python script I wrote a while back and forgot to commitFri, 26 Dec 2014 13:42:25 -0800, by Michael Pavone