Mercurial > repos > blastem
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Implemented shift instructions in new Z80 coreThu, 31 Jan 2019 23:33:36 -0800, by Michael Pavone
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Implemented the rest of the rotate instructions in new Z80 coreThu, 31 Jan 2019 23:03:51 -0800, by Michael Pavone
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Implementation of some of the rotate instructions in new Z80 coreThu, 31 Jan 2019 22:41:37 -0800, by Michael Pavone
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Implemented DD/FD prefixes for and/or/xor in new Z80 coreWed, 30 Jan 2019 22:11:12 -0800, by Michael Pavone
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Fix cp instruction in new Z80 core and implement its DD/FD prefixesWed, 30 Jan 2019 21:47:35 -0800, by Michael Pavone
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Implemented the rest of the dd/fd prefixes for the add/adc/sub/sbc/inc/dec instructions in new Z80 coreWed, 30 Jan 2019 18:55:58 -0800, by Michael Pavone
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Added implementations of a bunch of 16-bit arithmetic instructions and some DD/FD prefix instructions in new Z80 coreWed, 30 Jan 2019 09:32:56 -0800, by Michael Pavone
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Better error reporting when an instruction is given an insufficient number of parametersWed, 30 Jan 2019 09:32:01 -0800, by Michael Pavone
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Implement 16-bit addition in new Z80 core along with necessary CPU DSL fixes to make them work rightTue, 29 Jan 2019 23:56:48 -0800, by Michael Pavone
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fix half-carry for or and xor in new Z80 coreTue, 29 Jan 2019 22:17:15 -0800, by Michael Pavone
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Implement parity flag calculation typeTue, 29 Jan 2019 22:16:57 -0800, by Michael Pavone
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Fix ED prefix in new Z80 coreTue, 29 Jan 2019 21:29:08 -0800, by Michael Pavone
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Actually correct overflow flag calculation in CPU DSLTue, 29 Jan 2019 21:26:39 -0800, by Michael Pavone
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Fix sbc and implement carry/overflow flags for it in CPU DSLMon, 28 Jan 2019 22:56:43 -0800, by Michael Pavone
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Implementation of carry/overflow flags for adc instructions in CPU DSLMon, 28 Jan 2019 22:49:02 -0800, by Michael Pavone
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Fixed flag calculation for sub instructions in CPU DSLMon, 28 Jan 2019 22:37:46 -0800, by Michael Pavone
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Less broken flag calulcation for sub instructions in CPU DSLMon, 28 Jan 2019 21:30:23 -0800, by Michael Pavone
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Initial checkin of new WIP Z80 core using CPU DSLMon, 28 Jan 2019 21:16:41 -0800, by Michael Pavone
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Initial stab at overflow flag implementation in CPU DSL. Probably broken for subtractionMon, 28 Jan 2019 21:15:27 -0800, by Michael Pavone
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First stab at carry and half-carry calculation in CPU DSLMon, 28 Jan 2019 20:54:55 -0800, by Michael Pavone
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Fix zero flag calculation in CPU DSLMon, 28 Jan 2019 19:24:04 -0800, by Michael Pavone
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Implemented sbc instruction in CPU DSLSun, 27 Jan 2019 14:37:37 -0800, by Michael Pavone
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Added adc instruction to CPU DSLSun, 27 Jan 2019 05:55:08 -0800, by Michael Pavone
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Output tables in order specified by the extra_tables field so the user can deal with dependencies between tablesFri, 25 Jan 2019 14:30:55 -0800, by Michael Pavone