Mercurial > repos > blastem
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Implemented left column blank register bit in mode 5Thu, 15 Nov 2018 22:21:09 -0800, by Michael Pavone
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Initial stab at CRAM debug in a detached windowWed, 14 Nov 2018 22:16:35 -0800, by Michael Pavone
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Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write orderSun, 11 Nov 2018 22:39:29 -0800, by Michael Pavone
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Fix edge case in DRC audio pathSat, 10 Nov 2018 15:27:39 -0800, by Michael Pavone
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Added VRAM debug windowFri, 09 Nov 2018 20:16:09 -0800, by Michael Pavone
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Use SDL_GL_MakeCurrent to make the SDL renderer API windows play nice with GL windowsFri, 09 Nov 2018 09:26:07 -0800, by Michael Pavone
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Fix order bytes of a word are written into VRAM from the FIFO. Fixes ticket 36, the graphical glitch in Road Rash 3Mon, 05 Nov 2018 00:30:44 -0800, by Michael Pavone
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WIP new VDP plane debug view and support for detached VDP debug views generallySun, 04 Nov 2018 22:51:50 -0800, by Michael Pavone
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Added a 68K debugger command for setting a registerSun, 04 Nov 2018 11:45:41 -0800, by Michael Pavone
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Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the codeThu, 01 Nov 2018 20:14:56 -0700, by Michael Pavone
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Avoid changing VDP status flags when executing debugger commandsWed, 31 Oct 2018 21:58:59 -0700, by Michael Pavone
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Fix cycle count for shift/rotate instructions with a static shift ammountWed, 31 Oct 2018 21:58:09 -0700, by Michael Pavone
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Add new view for selecting a new binding for a gamepad buttonFri, 26 Oct 2018 23:11:37 -0700, by Michael Pavone
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Show user friendly names for binding options in controller bind configFri, 26 Oct 2018 08:38:11 -0700, by Michael Pavone
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Handle looking up dpad config in binding UI. Fix left/right stick config display in binding UIThu, 25 Oct 2018 19:12:40 -0700, by Michael Pavone
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Pull current controller config in binding UI from whatever the actual binding code would end up usingWed, 24 Oct 2018 21:10:12 -0700, by Michael Pavone
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Added some SVP register arrays for PMC stuffTue, 09 Oct 2018 09:29:28 -0700, by Michael Pavone
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Implement program ROM readsSat, 06 Oct 2018 17:33:15 -0700, by Michael Pavone
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Add the ability for a CPU definition to reference arbitrary C includes and use it to add a placeholder definition of svp_read_16Thu, 04 Oct 2018 19:12:56 -0700, by Michael Pavone
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Clean up warnings from -1 caseMon, 01 Oct 2018 19:16:54 -0700, by Michael Pavone
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Getting SVP core closer to compilingMon, 01 Oct 2018 19:11:17 -0700, by Michael Pavone
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Add missing end in svp_ram_read. Fix alu_ram_indirectTue, 25 Sep 2018 09:36:00 -0700, by Michael Pavone
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Fix implementation cmp+condition version of if in CPU DSLTue, 25 Sep 2018 09:33:46 -0700, by Michael Pavone
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Support immediate operands for ld and alu ops in SVP. Support double indirect and immediate address modes for alu ops. Fixed DSL issues revealed by those changesMon, 24 Sep 2018 19:09:16 -0700, by Michael Pavone
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Did some cleanup of SVP code using the newly more powerful DSL if block and fixed some issues in the DSL implementation that cropped up as a resultFri, 21 Sep 2018 09:26:12 -0700, by Michael Pavone
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Initial commit of CPU DSL and a WIP SVP implementation written in that DSLTue, 18 Sep 2018 09:06:42 -0700, by Michael Pavone
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Remove stray / in jcart.cTue, 14 Aug 2018 08:29:27 -0700, by Michael Pavone