Mercurial > repos > blastem
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Implement more address modes for movem dst and fix a missing break statement in translate_m68k_dstSat, 05 Jan 2013 01:55:11 -0800, by Mike Pavone
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Fix crash in printf from "crash" function due to lack of clearing raxSat, 05 Jan 2013 01:32:40 -0800, by Mike Pavone
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FIx movem when src is reg list and dst is not a areg predec modeSat, 05 Jan 2013 01:31:28 -0800, by Mike Pavone
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Fix predec address mode when used as sourceSat, 05 Jan 2013 00:53:50 -0800, by Mike Pavone
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Fix rotate instructions that use a register source. Fix ROXL/ROXR to actually use the appropriate x86 instruction.Fri, 04 Jan 2013 23:52:20 -0800, by Mike Pavone
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Add cycles for Bcc (needs work, but this changes keeps some ROMs from making the emulator unresponsive)Fri, 04 Jan 2013 23:25:23 -0800, by Mike Pavone
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Don't use the native call stack for M68K calls by defaultFri, 04 Jan 2013 23:21:07 -0800, by Mike Pavone
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Small fix for bit instructionsFri, 04 Jan 2013 22:51:01 -0800, by Mike Pavone
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Implement access to Z80 RAMFri, 04 Jan 2013 21:47:09 -0800, by Mike Pavone
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Implement TRAP (untested)Thu, 03 Jan 2013 22:49:21 -0800, by Mike Pavone
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Implement MULU/MULS and DIVU/DIVSThu, 03 Jan 2013 22:07:40 -0800, by Mike Pavone
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Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.Tue, 01 Jan 2013 09:40:17 -0800, by Mike Pavone
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Make writes to control and data port block when DMA is in progressTue, 01 Jan 2013 07:06:57 -0800, by Mike Pavone
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Bail out of disassembly of a particular stream when we hit an invalid instructionTue, 01 Jan 2013 07:04:48 -0800, by Mike Pavone
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Add hgignore fileTue, 01 Jan 2013 07:03:52 -0800, by Mike Pavone
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Implement most of the "X" instructionsMon, 31 Dec 2012 20:09:09 -0800, by Mike Pavone
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Implement m68k_modified_ret_addrMon, 31 Dec 2012 19:17:01 -0800, by Mike Pavone
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Comment out some debug printfsMon, 31 Dec 2012 18:53:52 -0800, by Mike Pavone
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Fix infinite loop bug in sprite renderingMon, 31 Dec 2012 18:36:16 -0800, by Mike Pavone
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Fix DMA fills to VRAMMon, 31 Dec 2012 18:22:25 -0800, by Mike Pavone
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Fix DMA in progress flag in VDP status registerMon, 31 Dec 2012 18:12:08 -0800, by Mike Pavone
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Fix label names in disassemblerMon, 31 Dec 2012 11:56:01 -0800, by Mike Pavone
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Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.Mon, 31 Dec 2012 11:54:27 -0800, by Mike Pavone
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Fix VDP readsMon, 31 Dec 2012 11:26:57 -0800, by Mike Pavone
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Implemented HV counterSun, 30 Dec 2012 22:39:41 -0800, by Mike Pavone
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Fix some bugs in decoding cmpSun, 30 Dec 2012 18:40:33 -0800, by Mike Pavone
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Fix 68K->VDP DMASun, 30 Dec 2012 11:54:25 -0800, by Mike Pavone
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Improve disassemblerSun, 30 Dec 2012 09:55:18 -0800, by Mike Pavone
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Add support for pc indexed addressing mode to leaSun, 30 Dec 2012 09:55:07 -0800, by Mike Pavone
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Support more address modes for jmpSun, 30 Dec 2012 07:52:44 -0800, by Mike Pavone
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Fix bug that was causing DMA fills to lock up under certain circumstancesSun, 30 Dec 2012 01:15:16 -0800, by Mike Pavone
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Make version register return correct value for USASun, 30 Dec 2012 00:11:03 -0800, by Mike Pavone
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Fix swapSat, 29 Dec 2012 23:40:30 -0800, by Mike Pavone
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Cleanup bit instructions and fix bug in translate_m68k_move that caused incorrect results once translate_m68k_src was fixedSat, 29 Dec 2012 23:08:14 -0800, by Mike Pavone
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Fix crash when printing error message about modified return addressSat, 29 Dec 2012 23:07:23 -0800, by Mike Pavone
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Fix check in translate_m68k_src that deals with instructions for which both operands are registers that are not mapped to a native x86-64 registerSat, 29 Dec 2012 22:22:53 -0800, by Mike Pavone
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Fix encoding of movsx instruction when used with new (i.e. r9-r15) registers. This fixes the indexed addressing modes when used with a word-wide index registerSat, 29 Dec 2012 22:11:28 -0800, by Mike Pavone
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Some fixes for translating code in located in RAMSat, 29 Dec 2012 21:55:42 -0800, by Mike Pavone
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Implement the rest of the bit instructionsSat, 29 Dec 2012 21:10:07 -0800, by Mike Pavone
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Implemented ROL and RORSat, 29 Dec 2012 20:33:39 -0800, by Mike Pavone
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Fix logic for switching between USP and SSPSat, 29 Dec 2012 12:52:19 -0800, by Mike Pavone
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Fix decoding of CMPAFri, 28 Dec 2012 22:47:22 -0800, by Mike Pavone
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Fix return address pushed to stack for jsrFri, 28 Dec 2012 22:47:10 -0800, by Mike Pavone
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cycles should return dstFri, 28 Dec 2012 21:36:22 -0800, by Mike Pavone
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Fix call_r in gen_x86 so that it properly returns a pointer to the location after the generated instructionFri, 28 Dec 2012 21:25:00 -0800, by Mike Pavone
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Implement pea (untested).Fri, 28 Dec 2012 21:20:14 -0800, by Mike Pavone
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Fix Z80 busreq logicFri, 28 Dec 2012 20:46:29 -0800, by Mike Pavone
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Allow jmp/jsr to follow pc-relative addresses in disassemblerFri, 28 Dec 2012 19:21:05 -0800, by Mike Pavone
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Defer the correct address for pc relative jsr/jmpFri, 28 Dec 2012 17:59:41 -0800, by Mike Pavone
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Implement scc (untested)Fri, 28 Dec 2012 17:57:43 -0800, by Mike Pavone
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Fix decoding of SccFri, 28 Dec 2012 15:34:24 -0800, by Mike Pavone
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Implement more address modes for jsrFri, 28 Dec 2012 15:16:36 -0800, by Mike Pavone
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COmment out fifo full debug printfFri, 28 Dec 2012 15:04:22 -0800, by Mike Pavone
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Fix horizontal mask values for scroll plane map address calculationFri, 28 Dec 2012 15:03:00 -0800, by Mike Pavone
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Fix areg indexed mode for move dstFri, 28 Dec 2012 14:30:25 -0800, by Mike Pavone
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Implement ORI to CCR/SRFri, 28 Dec 2012 11:07:13 -0800, by Mike Pavone