Mercurial > repos > blastem
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Don't allow register writes to regs above when in Mode 4Sun, 15 Sep 2013 23:40:18 -0700, by Mike Pavone
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Remove read pending stuff, that had been added in an attempt to fix CRAM/VSRAM undefined bit results. Set number of bits actually saved in VSRAM to 11Sun, 15 Sep 2013 23:33:24 -0700, by Mike Pavone
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Implement undocumented 8-bit VRAM readSun, 15 Sep 2013 23:00:17 -0700, by Mike Pavone
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Fix VSRAM readsSun, 15 Sep 2013 22:43:01 -0700, by Mike Pavone
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Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properlySun, 15 Sep 2013 22:20:43 -0700, by Mike Pavone
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Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.Fri, 13 Sep 2013 19:22:46 -0700, by Mike Pavone