Mercurial > repos > blastem
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Only latch video mode at the very beginning of the frame to avoid problems with the cycle count getting out of sync with what I expectTue, 14 May 2013 00:46:34 -0700, by Mike Pavone
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Update Z80 vint timingTue, 14 May 2013 00:40:10 -0700, by Mike Pavone
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Update hv counter calculation for clock wonkinessTue, 14 May 2013 00:28:45 -0700, by Mike Pavone
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Fixup VINT cycle and HBLANK flag for the previous timing fixesTue, 14 May 2013 00:03:26 -0700, by Mike Pavone
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Initial stab at implementing funky clock adjustments during HSYNC for H40 modeMon, 13 May 2013 23:42:52 -0700, by Mike Pavone
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Implement first line/last line weirdness in VDPMon, 13 May 2013 21:52:33 -0700, by Mike Pavone
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Fewer magic numbers in the VDP core for the winMon, 13 May 2013 21:36:33 -0700, by Mike Pavone
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Added some basic VDP debugging features to debugger. Fixed DMA enable bugMon, 13 May 2013 21:06:08 -0700, by Mike Pavone
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Added more 68K test casesMon, 13 May 2013 21:05:49 -0700, by Mike Pavone
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Fixed decoding of CHK destinationSun, 12 May 2013 01:34:29 -0700, by Mike Pavone
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Fix retrun address calculation for CHK exceptionsSun, 12 May 2013 01:34:17 -0700, by Mike Pavone
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Properly mask sprite X and Y coordinatesSat, 11 May 2013 23:59:20 -0700, by Mike Pavone
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Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.Sat, 11 May 2013 22:45:05 -0700, by Mike Pavone
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Don't update interrupt mask on non-interrupt exceptionsSat, 11 May 2013 21:19:31 -0700, by Mike Pavone
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Fix check for code writesSat, 11 May 2013 01:57:41 -0700, by Mike Pavone
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Port instruction retranslation improvements from Z80 core to M68K coreSat, 11 May 2013 01:38:57 -0700, by Mike Pavone
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Implement hblank flag in status registerFri, 10 May 2013 23:16:06 -0700, by Mike Pavone
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.Fri, 10 May 2013 22:57:56 -0700, by Mike Pavone
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Add YM2612 stubs to transz80Thu, 09 May 2013 20:59:49 -0700, by Mike Pavone
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Fix return address for RSTThu, 09 May 2013 20:09:49 -0700, by Mike Pavone
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Show absolute addresses for JR, JRCC and DJNZ in Z80 disassemblerThu, 09 May 2013 19:38:28 -0700, by Mike Pavone
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Fix terminal instruction detection in disassemblerThu, 09 May 2013 19:24:18 -0700, by Mike Pavone
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Properly handle instructions that use boty IYH and IYLThu, 09 May 2013 18:36:21 -0700, by Mike Pavone
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Set the N flag to the correct value for DEC instructionsThu, 09 May 2013 00:33:06 -0700, by Mike Pavone
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Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.Thu, 09 May 2013 00:30:55 -0700, by Mike Pavone
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Correctly set the N flag for SBCThu, 09 May 2013 00:17:12 -0700, by Mike Pavone
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86Thu, 09 May 2013 00:14:54 -0700, by Mike Pavone
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Complete flag behavior for Z80 BIT instructionWed, 08 May 2013 23:44:49 -0700, by Mike Pavone
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Properly handle negative displacements in Z80 coreWed, 08 May 2013 23:31:19 -0700, by Mike Pavone
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Contrary to the official documenation, OR and AND also set PV based on parity instead of overflowWed, 08 May 2013 23:29:21 -0700, by Mike Pavone