Mercurial > repos > blastem
view fib.s68 @ 1124:e4deab85f9ac
The function of the HVC Latch enable bit in mode register 1 is different when not in mode 5
author | Michael Pavone <pavone@retrodev.com> |
---|---|
date | Tue, 27 Dec 2016 13:38:58 -0800 |
parents | f664eeb55cb4 |
children | 2455662378ed f7fe240a7da6 |
line wrap: on
line source
dc.l $0, start start: moveq #36, d0 bsr fib illegal fib: cmp.l #2, d0 blt base subq.l #1, d0 move.l d0, -(a7) bsr fib move.l (a7), d1 exg d0, d1 move.l d1, (a7) subq.l #1, d0 bsr fib move.l (a7)+, d1 add.l d1, d0 rts base: moveq #1, d0 rts