Mercurial > repos > blastem
diff z80_to_x86.c @ 1053:b86c3ce007d9
Implemented undocumented flag bits for rotate instructions
author | Michael Pavone <pavone@retrodev.com> |
---|---|
date | Fri, 29 Jul 2016 09:23:59 -0700 |
parents | 366c28ac6c55 |
children | ca38a29d2d76 |
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--- a/z80_to_x86.c Fri Jul 29 09:14:32 2016 -0700 +++ b/z80_to_x86.c Fri Jul 29 09:23:59 2016 -0700 @@ -1455,8 +1455,11 @@ } if (dst_op.mode == MODE_REG_DIRECT) { rol_ir(code, 1, dst_op.base, SZ_B); + mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); } else { rol_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); + mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, SZ_B); + mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); } if (src_op.mode == MODE_REG_DIRECT) { mov_rr(code, dst_op.base, src_op.base, SZ_B); @@ -1502,8 +1505,11 @@ bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); if (dst_op.mode == MODE_REG_DIRECT) { rcl_ir(code, 1, dst_op.base, SZ_B); + mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); } else { rcl_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); + mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, SZ_B); + mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); } if (src_op.mode == MODE_REG_DIRECT) { mov_rr(code, dst_op.base, src_op.base, SZ_B); @@ -1548,8 +1554,11 @@ } if (dst_op.mode == MODE_REG_DIRECT) { ror_ir(code, 1, dst_op.base, SZ_B); + mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); } else { ror_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); + mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, SZ_B); + mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); } if (src_op.mode == MODE_REG_DIRECT) { mov_rr(code, dst_op.base, src_op.base, SZ_B); @@ -1595,8 +1604,11 @@ bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); if (dst_op.mode == MODE_REG_DIRECT) { rcr_ir(code, 1, dst_op.base, SZ_B); + mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); } else { rcr_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); + mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, SZ_B); + mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); } if (src_op.mode == MODE_REG_DIRECT) { mov_rr(code, dst_op.base, src_op.base, SZ_B);