Mercurial > repos > blastem
comparison m68k_core_x86.c @ 1097:faa3a4617f62
Get Jaguar video interrupt working
author | Michael Pavone <pavone@retrodev.com> |
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date | Sat, 05 Nov 2016 00:23:11 -0700 |
parents | 193db42e702b |
children | 2eb54e24914e |
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1096:1ab30d427db8 | 1097:faa3a4617f62 |
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2760 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, resume_pc), SZ_PTR); | 2760 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, resume_pc), SZ_PTR); |
2761 retn(code); | 2761 retn(code); |
2762 code->stack_off = tmp_stack_off; | 2762 code->stack_off = tmp_stack_off; |
2763 *do_int = code->cur - (do_int+1); | 2763 *do_int = code->cur - (do_int+1); |
2764 //implement 1 instruction latency | 2764 //implement 1 instruction latency |
2765 cmp_irdisp(code, 0, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B); | 2765 cmp_irdisp(code, INT_PENDING_NONE, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B); |
2766 do_int = code->cur + 1; | 2766 do_int = code->cur + 1; |
2767 jcc(code, CC_NZ, do_int); | 2767 jcc(code, CC_NZ, do_int); |
2768 //store current interrupt number so it doesn't change before we start processing the vector | 2768 //store current interrupt number so it doesn't change before we start processing the vector |
2769 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch1, SZ_B); | 2769 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch1, SZ_B); |
2770 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B); | 2770 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B); |
2822 add_rr(code, opts->gen.scratch1, RAX, SZ_D); | 2822 add_rr(code, opts->gen.scratch1, RAX, SZ_D); |
2823 | 2823 |
2824 //update status register | 2824 //update status register |
2825 and_irdisp(code, 0xF8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); | 2825 and_irdisp(code, 0xF8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
2826 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch1, SZ_B); | 2826 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch1, SZ_B); |
2827 //need to separate int priority and interrupt vector, but for now mask out large interrupt numbers | |
2828 and_ir(code, 0x7, opts->gen.scratch1, SZ_B); | |
2827 or_ir(code, 0x20, opts->gen.scratch1, SZ_B); | 2829 or_ir(code, 0x20, opts->gen.scratch1, SZ_B); |
2828 or_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); | 2830 or_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
2829 | 2831 |
2830 pop_r(code, opts->gen.scratch1); | 2832 pop_r(code, opts->gen.scratch1); |
2831 | 2833 |
2841 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, int_ack), SZ_W); | 2843 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, int_ack), SZ_W); |
2842 //calculate the vector address | 2844 //calculate the vector address |
2843 shl_ir(code, 2, opts->gen.scratch1, SZ_D); | 2845 shl_ir(code, 2, opts->gen.scratch1, SZ_D); |
2844 add_ir(code, 0x60, opts->gen.scratch1, SZ_D); | 2846 add_ir(code, 0x60, opts->gen.scratch1, SZ_D); |
2845 //clear out pending flag | 2847 //clear out pending flag |
2846 mov_irdisp(code, 0, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B); | 2848 mov_irdisp(code, INT_PENDING_NONE, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B); |
2847 //read vector | 2849 //read vector |
2848 call(code, opts->read_32); | 2850 call(code, opts->read_32); |
2849 call(code, opts->native_addr_and_sync); | 2851 call(code, opts->native_addr_and_sync); |
2850 //2 prefetch bus operations + 2 idle bus cycles | 2852 //2 prefetch bus operations + 2 idle bus cycles |
2851 cycles(&opts->gen, 10); | 2853 cycles(&opts->gen, 10); |