Mercurial > repos > blastem
comparison lc8951.c @ 2350:f8b5142c06aa
Allow 68K to return mid-instruction. Adjust how 68K interrupt ack works so int2 busy flag timing is more correct. Fix some other SCD timing issues
author | Michael Pavone <pavone@retrodev.com> |
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date | Mon, 16 Oct 2023 23:30:04 -0700 |
parents | 9f0c67e5c50a |
children | 0871f555eff6 |
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2349:f0fc6c09517d | 2350:f8b5142c06aa |
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291 } | 291 } |
292 } | 292 } |
293 } | 293 } |
294 } | 294 } |
295 | 295 |
296 void lc8951_resume_transfer(lc8951 *context, uint32_t cycle) | 296 void lc8951_resume_transfer(lc8951 *context) |
297 { | 297 { |
298 if (context->triggered && context->transfer_end == CYCLE_NEVER && (context->ifctrl & BIT_DOUTEN)) { | 298 if (context->triggered && context->transfer_end == CYCLE_NEVER && (context->ifctrl & BIT_DOUTEN)) { |
299 uint16_t transfer_size = context->regs[DBCL] | (context->regs[DBCH] << 8); | 299 uint16_t transfer_size = context->regs[DBCL] | (context->regs[DBCH] << 8); |
300 //HACK!!! Work around Sub CPU running longer than we would like and dragging other components with it | |
301 uint32_t step_diff = (context->cycle - cycle) / context->clock_step; | |
302 if (step_diff) { | |
303 context->cycle -= step_diff * context->clock_step; | |
304 } | |
305 context->transfer_end = context->cycle + transfer_size * context->cycles_per_byte; | 300 context->transfer_end = context->cycle + transfer_size * context->cycles_per_byte; |
306 context->next_byte_cycle = context->cycle; | 301 context->next_byte_cycle = context->cycle; |
307 if (step_diff) { | |
308 lc8951_run(context, cycle); | |
309 } | |
310 } | 302 } |
311 } | 303 } |
312 | 304 |
313 void lc8951_write_byte(lc8951 *context, uint32_t cycle, int sector_offset, uint8_t byte) | 305 void lc8951_write_byte(lc8951 *context, uint32_t cycle, int sector_offset, uint8_t byte) |
314 { | 306 { |