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The function of the HVC Latch enable bit in mode register 1 is different when not in mode 5
author Michael Pavone <pavone@retrodev.com>
date Tue, 27 Dec 2016 13:38:58 -0800
parents d5412f76accc
children fba485949723
comparison
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1123:d5412f76accc 1124:e4deab85f9ac
2375 return context->prefetch; 2375 return context->prefetch;
2376 } 2376 }
2377 2377
2378 uint16_t vdp_hv_counter_read(vdp_context * context) 2378 uint16_t vdp_hv_counter_read(vdp_context * context)
2379 { 2379 {
2380 if (context->regs[REG_MODE_1] & BIT_HVC_LATCH) { 2380 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) {
2381 return context->hv_latch; 2381 return context->hv_latch;
2382 } 2382 }
2383 uint32_t line= context->vcounter & 0xFF; 2383 uint32_t line= context->vcounter & 0xFF;
2384 uint32_t linecyc = context->hslot; 2384 uint32_t linecyc = context->hslot;
2385 linecyc &= 0xFF; 2385 linecyc &= 0xFF;