Mercurial > repos > blastem
comparison blastem.c @ 695:e1345921e481
Indentation fixup
author | Michael Pavone <pavone@retrodev.com> |
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date | Mon, 04 May 2015 08:48:10 -0700 |
parents | 318ebe078315 |
children | 0b2242bbc84a |
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694:7497334bb548 | 695:e1345921e481 |
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208 genesis_context * gen = context->system; | 208 genesis_context * gen = context->system; |
209 vdp_context * v_context = gen->vdp; | 209 vdp_context * v_context = gen->vdp; |
210 z80_context * z_context = gen->z80; | 210 z80_context * z_context = gen->z80; |
211 uint32_t mclks = context->current_cycle; | 211 uint32_t mclks = context->current_cycle; |
212 sync_z80(z_context, mclks); | 212 sync_z80(z_context, mclks); |
213 sync_sound(gen, mclks); | 213 sync_sound(gen, mclks); |
214 if (mclks >= mclk_target) { | 214 if (mclks >= mclk_target) { |
215 vdp_run_context(v_context, mclk_target); | 215 vdp_run_context(v_context, mclk_target); |
216 if (vdp_is_frame_over(v_context)) { | 216 if (vdp_is_frame_over(v_context)) { |
217 //printf("reached frame end | MCLK Cycles: %d, Target: %d, VDP cycles: %d\n", mclks, mclk_target, v_context->cycles); | 217 //printf("reached frame end | MCLK Cycles: %d, Target: %d, VDP cycles: %d\n", mclks, mclk_target, v_context->cycles); |
218 | 218 |
219 if (!headless) { | 219 if (!headless) { |
220 break_on_sync |= wait_render_frame(v_context, frame_limit); | 220 break_on_sync |= wait_render_frame(v_context, frame_limit); |
221 } else if(exit_after){ | 221 } else if(exit_after){ |
222 --exit_after; | 222 --exit_after; |
223 if (!exit_after) { | 223 if (!exit_after) { |
224 exit(0); | 224 exit(0); |
225 } | 225 } |
226 } | 226 } |
227 frame++; | 227 frame++; |
228 mclks -= mclk_target; | 228 mclks -= mclk_target; |
229 vdp_adjust_cycles(v_context, mclk_target); | 229 vdp_adjust_cycles(v_context, mclk_target); |
230 io_adjust_cycles(gen->ports, context->current_cycle, mclk_target); | 230 io_adjust_cycles(gen->ports, context->current_cycle, mclk_target); |
231 io_adjust_cycles(gen->ports+1, context->current_cycle, mclk_target); | 231 io_adjust_cycles(gen->ports+1, context->current_cycle, mclk_target); |
232 io_adjust_cycles(gen->ports+2, context->current_cycle, mclk_target); | 232 io_adjust_cycles(gen->ports+2, context->current_cycle, mclk_target); |
237 if (gen->ym->write_cycle != CYCLE_NEVER) { | 237 if (gen->ym->write_cycle != CYCLE_NEVER) { |
238 gen->ym->write_cycle = gen->ym->write_cycle >= mclk_target ? gen->ym->write_cycle - mclk_target : 0; | 238 gen->ym->write_cycle = gen->ym->write_cycle >= mclk_target ? gen->ym->write_cycle - mclk_target : 0; |
239 } | 239 } |
240 if (mclks) { | 240 if (mclks) { |
241 vdp_run_context(v_context, mclks); | 241 vdp_run_context(v_context, mclks); |
242 } | 242 } |
243 mclk_target = vdp_cycles_to_frame_end(v_context); | 243 mclk_target = vdp_cycles_to_frame_end(v_context); |
244 context->sync_cycle = mclk_target; | 244 context->sync_cycle = mclk_target; |
245 } else { | 245 } else { |
246 vdp_run_context(v_context, mclks); | 246 vdp_run_context(v_context, mclks); |
247 mclk_target = vdp_cycles_to_frame_end(v_context); | 247 mclk_target = vdp_cycles_to_frame_end(v_context); |
255 context->int_ack = 0; | 255 context->int_ack = 0; |
256 } | 256 } |
257 adjust_int_cycle(context, v_context); | 257 adjust_int_cycle(context, v_context); |
258 if (address) { | 258 if (address) { |
259 if (break_on_sync) { | 259 if (break_on_sync) { |
260 break_on_sync = 0; | 260 break_on_sync = 0; |
261 debugger(context, address); | 261 debugger(context, address); |
262 } | 262 } |
263 if (save_state) { | 263 if (save_state) { |
264 save_state = 0; | 264 save_state = 0; |
265 //advance Z80 core to the start of an instruction | 265 //advance Z80 core to the start of an instruction |
266 while (!z_context->pc) | 266 while (!z_context->pc) |
267 { | 267 { |