Mercurial > repos > blastem
comparison vdp.c @ 1320:df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
author | Michael Pavone <pavone@retrodev.com> |
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date | Mon, 17 Apr 2017 20:54:33 -0700 |
parents | b6796d63977f |
children | 0849e9356bfe |
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1319:b6796d63977f | 1320:df3d690cb2c3 |
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317 } | 317 } |
318 context->sprite_index--; | 318 context->sprite_index--; |
319 } | 319 } |
320 } | 320 } |
321 | 321 |
322 static uint32_t mode5_sat_address(vdp_context *context) | |
323 { | |
324 uint32_t addr = context->regs[REG_SAT] << 9; | |
325 if (!(context->regs[REG_MODE_2] & BIT_128K_VRAM)) { | |
326 addr &= 0xFFFF; | |
327 } | |
328 if (context->regs[REG_MODE_4] & BIT_H40) { | |
329 addr &= 0x1FC00; | |
330 } | |
331 return addr; | |
332 } | |
333 | |
322 void vdp_print_sprite_table(vdp_context * context) | 334 void vdp_print_sprite_table(vdp_context * context) |
323 { | 335 { |
324 if (context->regs[REG_MODE_2] & BIT_MODE_5) { | 336 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
325 uint16_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9; | 337 uint16_t sat_address = mode5_sat_address(context); |
326 uint16_t current_index = 0; | 338 uint16_t current_index = 0; |
327 uint8_t count = 0; | 339 uint8_t count = 0; |
328 do { | 340 do { |
329 uint16_t address = current_index * 8 + sat_address; | 341 uint16_t address = current_index * 8 + sat_address; |
330 uint16_t cache_address = current_index * 4; | 342 uint16_t cache_address = current_index * 4; |
436 "05: %.2X | Sprite Attribute Table: $%.4X\n" | 448 "05: %.2X | Sprite Attribute Table: $%.4X\n" |
437 "0D: %.2X | HScroll Data Table: $%.4X\n", | 449 "0D: %.2X | HScroll Data Table: $%.4X\n", |
438 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10, | 450 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10, |
439 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10, | 451 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10, |
440 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13, | 452 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13, |
441 context->regs[REG_SAT], (context->regs[REG_SAT] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x7E : 0x7F)) << 9, | 453 context->regs[REG_SAT], mode5_sat_address(context), |
442 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10); | 454 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10); |
443 } else { | 455 } else { |
444 printf("\n**Table Group**\n" | 456 printf("\n**Table Group**\n" |
445 "02: %.2X | Background Name Table: $%.4X\n" | 457 "02: %.2X | Background Name Table: $%.4X\n" |
446 "05: %.2X | Sprite Attribute Table: $%.4X\n" | 458 "05: %.2X | Sprite Attribute Table: $%.4X\n" |
628 if (context->flags2 & FLAG2_EVEN_FIELD) { | 640 if (context->flags2 & FLAG2_EVEN_FIELD) { |
629 line++; | 641 line++; |
630 } | 642 } |
631 height *= 2; | 643 height *= 2; |
632 } | 644 } |
633 uint16_t att_addr = ((context->regs[REG_SAT] & 0x7F) << 9) + context->sprite_info_list[context->cur_slot].index * 8 + 4; | 645 uint16_t att_addr = mode5_sat_address(context) + context->sprite_info_list[context->cur_slot].index * 8 + 4; |
634 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1]; | 646 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1]; |
635 uint8_t pal_priority = (tileinfo >> 9) & 0x70; | 647 uint8_t pal_priority = (tileinfo >> 9) & 0x70; |
636 uint8_t row; | 648 uint8_t row; |
637 if (tileinfo & MAP_BIT_V_FLIP) { | 649 if (tileinfo & MAP_BIT_V_FLIP) { |
638 row = (context->sprite_info_list[context->cur_slot].y + height - 1) - line; | 650 row = (context->sprite_info_list[context->cur_slot].y + height - 1) - line; |
758 } | 770 } |
759 | 771 |
760 void write_vram_word(vdp_context *context, uint32_t address, uint8_t value) | 772 void write_vram_word(vdp_context *context, uint32_t address, uint8_t value) |
761 { | 773 { |
762 if (!(address & 4)) { | 774 if (!(address & 4)) { |
763 uint32_t sat_address = (context->regs[REG_SAT] & 0xFF) << 9; | 775 uint32_t sat_address = mode5_sat_address(context); |
764 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { | 776 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { |
765 uint16_t cache_address = address - sat_address; | 777 uint16_t cache_address = address - sat_address; |
766 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); | 778 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); |
767 context->sat_cache[cache_address] = value >> 8; | 779 context->sat_cache[cache_address] = value >> 8; |
768 context->sat_cache[cache_address^1] = value; | 780 context->sat_cache[cache_address^1] = value; |
776 | 788 |
777 void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value) | 789 void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value) |
778 { | 790 { |
779 if (context->regs[REG_MODE_2] & BIT_MODE_5) { | 791 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
780 if (!(address & 4)) { | 792 if (!(address & 4)) { |
781 uint32_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9; | 793 uint32_t sat_address = mode5_sat_address(context); |
782 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { | 794 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { |
783 uint16_t cache_address = address - sat_address; | 795 uint16_t cache_address = address - sat_address; |
784 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); | 796 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); |
785 context->sat_cache[cache_address] = value; | 797 context->sat_cache[cache_address] = value; |
786 } | 798 } |