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comparison m68k_to_x86.c @ 70:cebd0b5ac7f0

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Make the translator bail out if it hits an instruction I haven't implemented yet
author Mike Pavone <pavone@retrodev.com>
date Thu, 20 Dec 2012 09:17:31 -0800
parents 534eb4976423
children f80fa1776507
comparison
equal deleted inserted replaced
69:36f1133837d0 70:cebd0b5ac7f0
937 if (inst->dst.addr_mode != MODE_UNUSED) { 937 if (inst->dst.addr_mode != MODE_UNUSED) {
938 dst = translate_m68k_dst(inst, &dst_op, dst, opts); 938 dst = translate_m68k_dst(inst, &dst_op, dst, opts);
939 } 939 }
940 switch(inst->op) 940 switch(inst->op)
941 { 941 {
942 case M68K_ABCD: 942 //case M68K_ABCD:
943 break; 943 // break;
944 case M68K_ADD: 944 case M68K_ADD:
945 dst = cycles(dst, BUS); 945 dst = cycles(dst, BUS);
946 if (src_op.mode == MODE_REG_DIRECT) { 946 if (src_op.mode == MODE_REG_DIRECT) {
947 if (dst_op.mode == MODE_REG_DIRECT) { 947 if (dst_op.mode == MODE_REG_DIRECT) {
948 dst = add_rr(dst, src_op.base, dst_op.base, inst->extra.size); 948 dst = add_rr(dst, src_op.base, dst_op.base, inst->extra.size);
963 dst = setcc_r(dst, CC_S, FLAG_N); 963 dst = setcc_r(dst, CC_S, FLAG_N);
964 dst = setcc_r(dst, CC_O, FLAG_V); 964 dst = setcc_r(dst, CC_O, FLAG_V);
965 dst = mov_rrind(dst, FLAG_C, CONTEXT, SZ_B); 965 dst = mov_rrind(dst, FLAG_C, CONTEXT, SZ_B);
966 dst = m68k_save_result(inst, dst, opts); 966 dst = m68k_save_result(inst, dst, opts);
967 break; 967 break;
968 case M68K_ADDX: 968 //case M68K_ADDX:
969 break; 969 // break;
970 case M68K_AND: 970 case M68K_AND:
971 dst = cycles(dst, BUS); 971 dst = cycles(dst, BUS);
972 if (src_op.mode == MODE_REG_DIRECT) { 972 if (src_op.mode == MODE_REG_DIRECT) {
973 if (dst_op.mode == MODE_REG_DIRECT) { 973 if (dst_op.mode == MODE_REG_DIRECT) {
974 dst = and_rr(dst, src_op.base, dst_op.base, inst->extra.size); 974 dst = and_rr(dst, src_op.base, dst_op.base, inst->extra.size);
988 dst = setcc_r(dst, CC_Z, FLAG_Z); 988 dst = setcc_r(dst, CC_Z, FLAG_Z);
989 dst = setcc_r(dst, CC_S, FLAG_N); 989 dst = setcc_r(dst, CC_S, FLAG_N);
990 dst = mov_ir(dst, 0, FLAG_V, SZ_B); 990 dst = mov_ir(dst, 0, FLAG_V, SZ_B);
991 dst = m68k_save_result(inst, dst, opts); 991 dst = m68k_save_result(inst, dst, opts);
992 break; 992 break;
993 case M68K_ANDI_CCR: 993 //case M68K_ANDI_CCR:
994 case M68K_ANDI_SR: 994 //case M68K_ANDI_SR:
995 break; 995 // break;
996 case M68K_ASL: 996 case M68K_ASL:
997 case M68K_LSL: 997 case M68K_LSL:
998 dst = translate_shift(dst, inst, &src_op, &dst_op, opts, shl_ir, shl_irdisp8, shl_clr, shl_clrdisp8, shr_ir, shr_irdisp8); 998 dst = translate_shift(dst, inst, &src_op, &dst_op, opts, shl_ir, shl_irdisp8, shl_clr, shl_clrdisp8, shr_ir, shr_irdisp8);
999 break; 999 break;
1000 case M68K_ASR: 1000 case M68K_ASR:
1001 dst = translate_shift(dst, inst, &src_op, &dst_op, opts, sar_ir, sar_irdisp8, sar_clr, sar_clrdisp8, NULL, NULL); 1001 dst = translate_shift(dst, inst, &src_op, &dst_op, opts, sar_ir, sar_irdisp8, sar_clr, sar_clrdisp8, NULL, NULL);
1002 break; 1002 break;
1003 case M68K_LSR: 1003 case M68K_LSR:
1004 dst = translate_shift(dst, inst, &src_op, &dst_op, opts, shr_ir, shr_irdisp8, shr_clr, shr_clrdisp8, shl_ir, shl_irdisp8); 1004 dst = translate_shift(dst, inst, &src_op, &dst_op, opts, shr_ir, shr_irdisp8, shr_clr, shr_clrdisp8, shl_ir, shl_irdisp8);
1005 break; 1005 break;
1006 case M68K_BCHG: 1006 /*case M68K_BCHG:
1007 case M68K_BCLR: 1007 case M68K_BCLR:
1008 case M68K_BSET: 1008 case M68K_BSET:
1009 break; 1009 break;*/
1010 case M68K_BTST: 1010 case M68K_BTST:
1011 dst = cycles(dst, inst->extra.size == OPSIZE_BYTE ? 4 : 6); 1011 dst = cycles(dst, inst->extra.size == OPSIZE_BYTE ? 4 : 6);
1012 if (src_op.mode == MODE_IMMED) { 1012 if (src_op.mode == MODE_IMMED) {
1013 if (inst->extra.size == OPSIZE_BYTE) { 1013 if (inst->extra.size == OPSIZE_BYTE) {
1014 src_op.disp &= 0x7; 1014 src_op.disp &= 0x7;
1043 dst = setcc_r(dst, CC_NC, FLAG_Z); 1043 dst = setcc_r(dst, CC_NC, FLAG_Z);
1044 if (src_op.base == SCRATCH2) { 1044 if (src_op.base == SCRATCH2) {
1045 dst = pop_r(dst, SCRATCH2); 1045 dst = pop_r(dst, SCRATCH2);
1046 } 1046 }
1047 break; 1047 break;
1048 case M68K_CHK: 1048 /*case M68K_CHK:
1049 break; 1049 break;*/
1050 case M68K_CMP: 1050 case M68K_CMP:
1051 dst = cycles(dst, BUS); 1051 dst = cycles(dst, BUS);
1052 if (src_op.mode == MODE_REG_DIRECT) { 1052 if (src_op.mode == MODE_REG_DIRECT) {
1053 if (dst_op.mode == MODE_REG_DIRECT) { 1053 if (dst_op.mode == MODE_REG_DIRECT) {
1054 dst = cmp_rr(dst, src_op.base, dst_op.base, inst->extra.size); 1054 dst = cmp_rr(dst, src_op.base, dst_op.base, inst->extra.size);
1067 dst = setcc_r(dst, CC_C, FLAG_C); 1067 dst = setcc_r(dst, CC_C, FLAG_C);
1068 dst = setcc_r(dst, CC_Z, FLAG_Z); 1068 dst = setcc_r(dst, CC_Z, FLAG_Z);
1069 dst = setcc_r(dst, CC_S, FLAG_N); 1069 dst = setcc_r(dst, CC_S, FLAG_N);
1070 dst = setcc_r(dst, CC_O, FLAG_V); 1070 dst = setcc_r(dst, CC_O, FLAG_V);
1071 break; 1071 break;
1072 case M68K_DIVS: 1072 /*case M68K_DIVS:
1073 case M68K_DIVU: 1073 case M68K_DIVU:
1074 break; 1074 break;*/
1075 case M68K_EOR: 1075 case M68K_EOR:
1076 dst = cycles(dst, BUS); 1076 dst = cycles(dst, BUS);
1077 if (src_op.mode == MODE_REG_DIRECT) { 1077 if (src_op.mode == MODE_REG_DIRECT) {
1078 if (dst_op.mode == MODE_REG_DIRECT) { 1078 if (dst_op.mode == MODE_REG_DIRECT) {
1079 dst = xor_rr(dst, src_op.base, dst_op.base, inst->extra.size); 1079 dst = xor_rr(dst, src_op.base, dst_op.base, inst->extra.size);
1093 dst = setcc_r(dst, CC_Z, FLAG_Z); 1093 dst = setcc_r(dst, CC_Z, FLAG_Z);
1094 dst = setcc_r(dst, CC_S, FLAG_N); 1094 dst = setcc_r(dst, CC_S, FLAG_N);
1095 dst = mov_ir(dst, 0, FLAG_V, SZ_B); 1095 dst = mov_ir(dst, 0, FLAG_V, SZ_B);
1096 dst = m68k_save_result(inst, dst, opts); 1096 dst = m68k_save_result(inst, dst, opts);
1097 break; 1097 break;
1098 case M68K_EORI_CCR: 1098 /*case M68K_EORI_CCR:
1099 case M68K_EORI_SR: 1099 case M68K_EORI_SR:*/
1100 case M68K_EXG: 1100 case M68K_EXG:
1101 dst = cycles(dst, 6); 1101 dst = cycles(dst, 6);
1102 if (dst_op.mode == MODE_REG_DIRECT) { 1102 if (dst_op.mode == MODE_REG_DIRECT) {
1103 dst = mov_rr(dst, dst_op.base, SCRATCH2, SZ_D); 1103 dst = mov_rr(dst, dst_op.base, SCRATCH2, SZ_D);
1104 if (src_op.mode == MODE_REG_DIRECT) { 1104 if (src_op.mode == MODE_REG_DIRECT) {
1125 case M68K_ILLEGAL: 1125 case M68K_ILLEGAL:
1126 dst = call(dst, (uint8_t *)m68k_save_context); 1126 dst = call(dst, (uint8_t *)m68k_save_context);
1127 dst = mov_rr(dst, CONTEXT, RDI, SZ_Q); 1127 dst = mov_rr(dst, CONTEXT, RDI, SZ_Q);
1128 dst = call(dst, (uint8_t *)print_regs_exit); 1128 dst = call(dst, (uint8_t *)print_regs_exit);
1129 break; 1129 break;
1130 case M68K_JSR: 1130 /*case M68K_JSR:
1131 case M68K_LEA: 1131 case M68K_LEA:
1132 case M68K_LINK: 1132 case M68K_LINK:
1133 case M68K_MOVE_CCR: 1133 case M68K_MOVE_CCR:
1134 case M68K_MOVE_FROM_SR: 1134 case M68K_MOVE_FROM_SR:
1135 case M68K_MOVE_SR: 1135 case M68K_MOVE_SR:
1139 case M68K_MULS: 1139 case M68K_MULS:
1140 case M68K_MULU: 1140 case M68K_MULU:
1141 case M68K_NBCD: 1141 case M68K_NBCD:
1142 case M68K_NEG: 1142 case M68K_NEG:
1143 case M68K_NEGX: 1143 case M68K_NEGX:
1144 break; 1144 break;*/
1145 case M68K_NOP: 1145 case M68K_NOP:
1146 dst = cycles(dst, BUS); 1146 dst = cycles(dst, BUS);
1147 break; 1147 break;
1148 case M68K_NOT: 1148 case M68K_NOT:
1149 break; 1149 break;
1168 dst = setcc_r(dst, CC_Z, FLAG_Z); 1168 dst = setcc_r(dst, CC_Z, FLAG_Z);
1169 dst = setcc_r(dst, CC_S, FLAG_N); 1169 dst = setcc_r(dst, CC_S, FLAG_N);
1170 dst = mov_ir(dst, 0, FLAG_V, SZ_B); 1170 dst = mov_ir(dst, 0, FLAG_V, SZ_B);
1171 dst = m68k_save_result(inst, dst, opts); 1171 dst = m68k_save_result(inst, dst, opts);
1172 break; 1172 break;
1173 case M68K_ORI_CCR: 1173 /*case M68K_ORI_CCR:
1174 case M68K_ORI_SR: 1174 case M68K_ORI_SR:
1175 case M68K_PEA: 1175 case M68K_PEA:
1176 case M68K_RESET: 1176 case M68K_RESET:
1177 case M68K_ROL: 1177 case M68K_ROL:
1178 case M68K_ROR: 1178 case M68K_ROR:
1181 case M68K_RTE: 1181 case M68K_RTE:
1182 case M68K_RTR: 1182 case M68K_RTR:
1183 case M68K_SBCD: 1183 case M68K_SBCD:
1184 case M68K_SCC: 1184 case M68K_SCC:
1185 case M68K_STOP: 1185 case M68K_STOP:
1186 break; 1186 break;*/
1187 case M68K_SUB: 1187 case M68K_SUB:
1188 dst = cycles(dst, BUS); 1188 dst = cycles(dst, BUS);
1189 if (src_op.mode == MODE_REG_DIRECT) { 1189 if (src_op.mode == MODE_REG_DIRECT) {
1190 if (dst_op.mode == MODE_REG_DIRECT) { 1190 if (dst_op.mode == MODE_REG_DIRECT) {
1191 dst = sub_rr(dst, src_op.base, dst_op.base, inst->extra.size); 1191 dst = sub_rr(dst, src_op.base, dst_op.base, inst->extra.size);
1206 dst = setcc_r(dst, CC_S, FLAG_N); 1206 dst = setcc_r(dst, CC_S, FLAG_N);
1207 dst = setcc_r(dst, CC_O, FLAG_V); 1207 dst = setcc_r(dst, CC_O, FLAG_V);
1208 dst = mov_rrind(dst, FLAG_C, CONTEXT, SZ_B); 1208 dst = mov_rrind(dst, FLAG_C, CONTEXT, SZ_B);
1209 dst = m68k_save_result(inst, dst, opts); 1209 dst = m68k_save_result(inst, dst, opts);
1210 break; 1210 break;
1211 case M68K_SUBX: 1211 //case M68K_SUBX:
1212 break; 1212 // break;
1213 case M68K_SWAP: 1213 case M68K_SWAP:
1214 dst = cycles(dst, BUS); 1214 dst = cycles(dst, BUS);
1215 if (src_op.mode == MODE_REG_DIRECT) { 1215 if (src_op.mode == MODE_REG_DIRECT) {
1216 dst = rol_ir(dst, 16, src_op.base, inst->extra.size); 1216 dst = rol_ir(dst, 16, src_op.base, inst->extra.size);
1217 } else{ 1217 } else{
1220 dst = mov_ir(dst, 0, FLAG_C, SZ_B); 1220 dst = mov_ir(dst, 0, FLAG_C, SZ_B);
1221 dst = setcc_r(dst, CC_Z, FLAG_Z); 1221 dst = setcc_r(dst, CC_Z, FLAG_Z);
1222 dst = setcc_r(dst, CC_S, FLAG_N); 1222 dst = setcc_r(dst, CC_S, FLAG_N);
1223 dst = mov_ir(dst, 0, FLAG_V, SZ_B); 1223 dst = mov_ir(dst, 0, FLAG_V, SZ_B);
1224 break; 1224 break;
1225 case M68K_TAS: 1225 /*case M68K_TAS:
1226 case M68K_TRAP: 1226 case M68K_TRAP:
1227 case M68K_TRAPV: 1227 case M68K_TRAPV:*/
1228 case M68K_TST: 1228 case M68K_TST:
1229 dst = cycles(dst, BUS); 1229 dst = cycles(dst, BUS);
1230 if (src_op.mode == MODE_REG_DIRECT) { 1230 if (src_op.mode == MODE_REG_DIRECT) {
1231 dst = cmp_ir(dst, 0, src_op.base, inst->extra.size); 1231 dst = cmp_ir(dst, 0, src_op.base, inst->extra.size);
1232 } else { //M68000 doesn't support immedate operand for tst, so this must be MODE_REG_DISPLACE8 1232 } else { //M68000 doesn't support immedate operand for tst, so this must be MODE_REG_DISPLACE8
1235 dst = setcc_r(dst, CC_C, FLAG_C); 1235 dst = setcc_r(dst, CC_C, FLAG_C);
1236 dst = setcc_r(dst, CC_Z, FLAG_Z); 1236 dst = setcc_r(dst, CC_Z, FLAG_Z);
1237 dst = setcc_r(dst, CC_S, FLAG_N); 1237 dst = setcc_r(dst, CC_S, FLAG_N);
1238 dst = setcc_r(dst, CC_O, FLAG_V); 1238 dst = setcc_r(dst, CC_O, FLAG_V);
1239 break; 1239 break;
1240 case M68K_UNLK: 1240 /*case M68K_UNLK:
1241 case M68K_INVALID: 1241 case M68K_INVALID:
1242 break; 1242 break;*/
1243 default:
1244 printf("instruction %d not yet implemented\n", inst->op);
1245 exit(1);
1243 } 1246 }
1244 return dst; 1247 return dst;
1245 } 1248 }
1246 1249
1247 uint8_t * translate_m68k_stream(uint8_t * dst, uint8_t * dst_end, uint32_t address, m68k_context * context) 1250 uint8_t * translate_m68k_stream(uint8_t * dst, uint8_t * dst_end, uint32_t address, m68k_context * context)