Mercurial > repos > blastem
comparison vdp.c @ 705:ce4046476abc
Add description of cd register value to vr debugger command
author | Michael Pavone <pavone@retrodev.com> |
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date | Wed, 13 May 2015 19:19:43 -0700 |
parents | d8a1fdec68fc |
children | 61faa298af07 |
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704:1a14f5f6c6a1 | 705:ce4046476abc |
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205 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5; | 205 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5; |
206 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern); | 206 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern); |
207 current_index = link; | 207 current_index = link; |
208 count++; | 208 count++; |
209 } while (current_index != 0 && count < 80); | 209 } while (current_index != 0 && count < 80); |
210 } | |
211 | |
212 #define VRAM_READ 0 //0000 | |
213 #define VRAM_WRITE 1 //0001 | |
214 //2 would trigger register write 0010 | |
215 #define CRAM_WRITE 3 //0011 | |
216 #define VSRAM_READ 4 //0100 | |
217 #define VSRAM_WRITE 5//0101 | |
218 //6 would trigger regsiter write 0110 | |
219 //7 is a mystery | |
220 #define CRAM_READ 8 //1000 | |
221 //9 is also a mystery //1001 | |
222 //A would trigger register write 1010 | |
223 //B is a mystery 1011 | |
224 #define VRAM_READ8 0xC //1100 | |
225 //D is a mystery 1101 | |
226 //E would trigger register write 1110 | |
227 //F is a mystery 1111 | |
228 #define DMA_START 0x20 | |
229 | |
230 const char * cd_name(uint8_t cd) | |
231 { | |
232 switch (cd & 0xF) | |
233 { | |
234 case VRAM_READ: | |
235 return "VRAM read"; | |
236 case VRAM_WRITE: | |
237 return "VRAM write"; | |
238 case CRAM_WRITE: | |
239 return "CRAM write"; | |
240 case VSRAM_READ: | |
241 return "VSRAM read"; | |
242 case VSRAM_WRITE: | |
243 return "VSRAM write"; | |
244 case VRAM_READ8: | |
245 return "VRAM read (undocumented 8-bit mode)"; | |
246 default: | |
247 return "invalid"; | |
248 } | |
210 } | 249 } |
211 | 250 |
212 void vdp_print_reg_explain(vdp_context * context) | 251 void vdp_print_reg_explain(vdp_context * context) |
213 { | 252 { |
214 char * hscroll[] = {"full", "7-line", "cell", "line"}; | 253 char * hscroll[] = {"full", "7-line", "cell", "line"}; |
259 context->regs[REG_DMASRC_H], | 298 context->regs[REG_DMASRC_H], |
260 context->regs[REG_DMASRC_H] << 17 | context->regs[REG_DMASRC_M] << 9 | context->regs[REG_DMASRC_L] << 1, | 299 context->regs[REG_DMASRC_H] << 17 | context->regs[REG_DMASRC_M] << 9 | context->regs[REG_DMASRC_L] << 1, |
261 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]); | 300 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]); |
262 printf("\n**Internal Group**\n" | 301 printf("\n**Internal Group**\n" |
263 "Address: %X\n" | 302 "Address: %X\n" |
264 "CD: %X\n" | 303 "CD: %X - %s\n" |
265 "Pending: %s\n" | 304 "Pending: %s\n" |
266 "VCounter: %d\n" | 305 "VCounter: %d\n" |
267 "HCounter: %d\n", | 306 "HCounter: %d\n", |
268 context->address, context->cd, (context->flags & FLAG_PENDING) ? "true" : "false", | 307 context->address, context->cd, cd_name(context->cd), (context->flags & FLAG_PENDING) ? "true" : "false", |
269 context->vcounter, context->hslot*2); | 308 context->vcounter, context->hslot*2); |
270 | 309 |
271 //TODO: Window Group, DMA Group | 310 //TODO: Window Group, DMA Group |
272 } | 311 } |
273 | 312 |
413 context->cram[addr] = value; | 452 context->cram[addr] = value; |
414 context->colors[addr] = color_map[value & 0xEEE]; | 453 context->colors[addr] = color_map[value & 0xEEE]; |
415 context->colors[addr + CRAM_SIZE] = color_map[(value & 0xEEE) | FBUF_SHADOW]; | 454 context->colors[addr + CRAM_SIZE] = color_map[(value & 0xEEE) | FBUF_SHADOW]; |
416 context->colors[addr + CRAM_SIZE*2] = color_map[(value & 0xEEE) | FBUF_HILIGHT]; | 455 context->colors[addr + CRAM_SIZE*2] = color_map[(value & 0xEEE) | FBUF_HILIGHT]; |
417 } | 456 } |
418 | |
419 #define VRAM_READ 0 //0000 | |
420 #define VRAM_WRITE 1 //0001 | |
421 //2 would trigger register write 0010 | |
422 #define CRAM_WRITE 3 //0011 | |
423 #define VSRAM_READ 4 //0100 | |
424 #define VSRAM_WRITE 5//0101 | |
425 //6 would trigger regsiter write 0110 | |
426 //7 is a mystery | |
427 #define CRAM_READ 8 //1000 | |
428 //9 is also a mystery //1001 | |
429 //A would trigger register write 1010 | |
430 //B is a mystery 1011 | |
431 #define VRAM_READ8 0xC //1100 | |
432 //D is a mystery 1101 | |
433 //E would trigger register write 1110 | |
434 //F is a mystery 1111 | |
435 #define DMA_START 0x20 | |
436 | 457 |
437 void external_slot(vdp_context * context) | 458 void external_slot(vdp_context * context) |
438 { | 459 { |
439 fifo_entry * start = context->fifo + context->fifo_read; | 460 fifo_entry * start = context->fifo + context->fifo_read; |
440 /*if (context->flags2 & FLAG2_READ_PENDING) { | 461 /*if (context->flags2 & FLAG2_READ_PENDING) { |